Browsing by Author "Saraswat, K. C."

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Open Access
Defect reduction of Ge on Si by selective epitaxy and hydrogen annealing
(2008-10) Yu, H.-Y.; Park, J.-H.; Okyay, Ali Kemal; Saraswat, K. C.
We demonstrate a promising approach for the monolithic integration of Ge-based nanoelectronics and nanophotonics with S-ilicon: the selective deposition of Ge on Si by Multiple Hydrogen Annealing for Heteroepitaxy (MHAH). Very high quality Ge layers can be selectively integrated on Si CMOS platform with this technique. We confirm the reduction of dislocation density in Ge layers using AFM surface morphology study. In addition, in situ doping of Ge layers is achieved and MOS capacitor structures are studied. ©The Electrochemical Society.
Open Access
Experimental and theoretical investigation of phosphorus in-situ doping of germanium epitaxial layers
(Elsevier, 2013) Yu, H. -Y.; Battal, E.; Okyay, Ali Kemal; Shim, J.; Park J. -H.; Baek, J. W.; Saraswat, K. C.
We investigate phosphorus in-situ doping characteristics in germanium (Ge) during epitaxial growth by spreading resistance profiling analysis. In addition, we present an accurate model for the kinetics of the diffusion in the in-situ process, modeling combined growth and diffusion events. The activation energy and pre-exponential factor for phosphorus (P) diffusion are determined to be 1.91 eV and 3.75 × 10-5 cm2/s. These results show that P in-situ doping diffusivity is low enough to form shallow junctions for high performance Ge devices.
Open Access
Germanium for high performance MOSFETs and optical interconnects
(2008-10) Saraswat, K. C.; Kim, D.; Krishnamohan, T.; Kuzum, D.; Okyay, Ali Kemal; Pethe, A.; Yu H.-Y.
It is believed that to continue the scaling of silicon CMOS innovative device structures and new materials have to be created in order to continue the historic progress in information processing and transmission. Recently germanium has emerged as a viable candidate to augment Si for CMOS and optoelectronic applications. In this work we will first review recent results on growth of thin and thick films of Ge on Si, technology for appropriate cleaning of Ge, surface passivation using high-κ dielectrics, and metal induced crystallization of amorphous Ge and dopant activation. Next we will review application of Ge for high performance MOSFETs. Innovative Si/Ge MOS heterostructures will be described with high on current and low off currents. Finally we will describe optical detectors and modulators for on-chip and off-chip interconnect. Successful integration of Ge on Si should allow continued scaling of silicon CMOS to below 22 nm node. ©The Electrochemical Society.
Open Access
High performance n-MOSFETs with novel source/drain on selectively grown Ge on Si for monolithic integration
(IEEE, 2009) Yu, H.-Y.; Kobayashi, M.; Jung, W. S.; Okyay, Ali Kemal; Nishi, Y.; Saraswat, K. C.
We demonstrate high performance Ge n-MOSFETs with novel raised source/drain fabricated on high quality single crystal Ge selectively grown heteroepitaxially on Si using Multiple Hydrogen Anealing for Heteroepitaxy(MHAH) technique. Until now low source/drain series resistance in Ge n-MOSFETs has been a highly challenging problem. Source and drain are formed by implant-free, in-situ doping process for the purpose of very low series resistance and abrupt and shallow n+/p junctions. The novel n-MOSFETs show among the highest electron mobility reported on (100) Ge to-date. Furthermore, these devices provide an excellent Ion/Ioff ratio(4× 103) with very high Ion of 3.23μA/μm. These results show promise towards monolithic integration of Ge MOSFETs with Si CMOS VLSI platform.
Open Access
High quality single-crystal germanium-on-insulator on bulk Si substrates based on multistep lateral over-growth with hydrogen annealing
(American Institute of Physics, 2010-08-09) Yu, H. Y.; Cheng, S. L.; Park, J. H.; Okyay, Ali Kemal; Onbal, M. C.; Ercan, B.; Nishi, Y.; Saraswat, K. C.
Germanium-on-insulator (GOI) is desired for high performance metal-oxide-semiconductor transistors and monolithically integrated optoelectronics. We demonstrate a promising approach to achieve single-crystal defect-free GOI by using lateral over-growth through SiO2 window. The dislocations due to the lattice mismatch are effectively terminated and reduced in SiO2 trench by selective area heteroepitaxy combined with hydrogen annealing. Low defect density of 4× 106 cm-2 and low surface roughness of 0.7 nm (root-mean-square) on GOI are confirmed by plan-view transmission electron microscopy and atomic force microscopy analysis. In addition, the excellent metal-semiconductor-metal diode electrical characteristics fabricated on this GOI confirm Ge crystal quality. The selectively grown GOI structure can provide the monolithic integration of SiGe based devices on a Si very large scale integration (VLSI) platform
Open Access
High-efficiency p-i-n photodetectors on selective-area-grown Ge for monolithic integration
(Institute of Electrical and Electronics Engineers, 2009) Yu, H.-Y.; Ren, S.; Jung, W. S.; Okyay, Ali Kemal; Miller, D. A. B.; Saraswat, K. C.
We demonstrate normal incidence p-i-n photodiodes on selective-area-grown Ge using multiple hydrogen annealing for heteroepitaxy for the purpose of monolithic integration. An enhanced efficiency in the near-infrared regime and the absorption edge shifting to longer wavelength is achieved due to 0.14% residual tensile strain in the selective-area-grown Ge. The responsivities at 1.48, 1.525, and 1.55 μ are 0.8, 0.7, and 0.64 A/W, respectively, without an optimal antireflection coating. These results are promising toward monolithically integrated on-chip optical links and in telecommunications. © 2009 IEEE.
Open Access
Selective-area high-quality germanium growth for monolithic integrated optoelectronics
(Institute of Electrical and Electronics Engineers, 2012-03-02) Yu, H. Y.; Park, J. H.; Okyay, Ali Kemal; Saraswat, K. C.
Selective-area germanium (Ge) layer on silicon (Si) is desired to realize the advanced Ge devices integrated with Si very-large-scale-integration (VLSI) components. We demonstrate the area-dependent high-quality Ge growth on Si substrate through SiO 2 windows. The combination of area-dependent growth and multistep deposition/hydrogen annealing cycles has effectively reduced the surface roughness and the threading dislocation density. Low root-mean-square surface roughness of 0.6 nm is confirmed by atomic-force-microscope analysis. Low defect density in the area-dependent grown Ge layer is measured to be as low as 1 × 10 7cm -2 by plan-view transmission-electron-miscroscope analysis. In addition, the excellent metal-semiconductor-metal photodiode characteristics are shown on the grown Ge layer to open up a possibility to merge Ge optoelectronics with Si VLSI.