Browsing by Subject "Routers"
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Item Open Access AIMD-based online MPLS traffic engineering for TCP flows via distributed multi-path routing(Springer, 2004) Alparslan O.; Akar, N.; Karasan, E.With this paper, we propose a distributed online traffic engineering architecture for MPLS networks. In this architecture, a primary and secondary MPLS LSP are established from an ingress LSR to every other egress LSR. We propose to split the TCP traffic between the primary and secondary paths using a distributed mechanism based on ECN marking and AIMD-based rate control. Inspired by the random early detection mechanism for active queue management, we propose a random early reroute scheme to adaptively control the delay difference between the primary and secondary LSPS. Considering the adverse effect of packet reordering on TCP performance for packet-based load balancing schemes, we propose that the TCP splitting mechanism operates on a per-flow basis. Using flow-based models developed for Internet traffic and simulations, we show that flow-based distributed multi-path traffic engineering outperforms on a consistent basis the case of a single path in terms of per-flow goodputs. Due to the elimination of out-of-order packet arrivals, flow-based splitting also enhances TCP performance with respect to packet-based splitting especially for long TCP flows that are hit hard by packet reordering. We also compare and contrast two queuing architectures for differential treatment of data packets routed over primary and secondary LSPS in the MPLS data plane, namely first-in-first-out and strict priority queuing. We show through simulations that strict priority queuing is more effective and relatively more robust with respect to the changes in the traffic demand matrix than first-in-first-out queuing in the context of distributed multi-path routing.Item Open Access Application-specific heterogeneous network-on-chip design(Oxford University Press, 2014) Demirbas, D.; Akturk, I.; Ozturk, O.; Güdükbay, UğurAs a result of increasing communication demands, application-specific and scalable Network-on-Chips (NoCs) have emerged to connect processing cores and subsystems in Multiprocessor System-on-Chips. A challenge in application-specific NoC design is to find the right balance among different tradeoffs, such as communication latency, power consumption and chip area. We propose a novel approach that generates latency-aware heterogeneous NoC topology. Experimental results show that our approach improves the total communication latency up to 27% with modest power consumption. © 2013 The Author 2013. Published by Oxford University Press on behalf of The British Computer Society.Item Open Access Available bit rate traffic engineering in MPLS networks with flow-based multipath routing(Institute of Electronics Information and Communication Engineers, 2004) Akar, N.; Hökelek, İ.; Karasan, E.In this paper, we propose a novel traffic engineering architecture for IP networks with MPLS backbones. In this architecture, two link-disjoint label switched paths, namely the primary and secondary paths, are established among every pair of IP routers located at the edges of an MPLS backbone network. As the main building block of this architecture, we propose that primary paths are given higher priority against the secondary paths in the MPLS data plane to cope with the so-called knock-on effect. Inspired by the ABR flow control mechanism in ATM networks, we propose to split traffic between a source-destination pair between the primary and secondary paths using explicit rate feedback from the network. Taking into consideration the performance deteriorating impact of packet reordering in packet-based load balancing schemes, we propose a traffic splitting mechanism that operates on a per-flow basis (i.e., flow-based multipath routing). We show via an extensive simulation study that using flow-based multipath traffic engineering with explicit rate feedback not only provides consistently better throughput than that of a single path but is also void of out-of-order packet delivery.Item Open Access Comparative analysis of power consumption in asynchronous wavelength modular optical switching fabrics(Elsevier, 2011-04-02) Akar, N.; Eramo, V.; Raffaelli, C.Next-generation optical routers will be designed to support the flexibility required by Future Internet services and, at the same time, to overcome the power consumption bottleneck which appears to limit throughput scalability in today routers. A model to evaluate average power consumption in asynchronous optical switching fabrics is here presented to compare these architectures with other synchronous and asynchronous solutions. The combination of wavelength modular switching fabrics with low spatial complexity and asynchronous operation is demonstrated to be the most power-efficient solution among those considered which employ wavelength converters, through presentation and discussion of a thorough set of numerical results.Item Open Access Design of translucent optical networks: Partitioning and restoration(Kluwer, 2004) Karasan, E.; Arisoylu, M.We discuss the problem of designing translucent optical networks composed of restorable, transparent subnetworks interconnected via transponders. We develop an integer linear programming (ILP) formulation for partitioning an optical network topology into subnetworks, where the subnetworks are determined subject to the constraints that each subnetwork satisfies size limitations, and it is two-connected. A greedy heuristic partitioning algorithm is proposed for planar network topologies. We use section restoration for translucent networks where failed connections are rerouted within the subnetwork which contains the failed link. The network design problem of determining working and restoration capacities with section restoration is formulated as an ILP problem. Numerical results show that fiber costs with section restoration are close to those with path restoration for mesh topologies used in this study. It is also shown that the number of transponders with the translucent network architecture is substantially reduced compared to opaque networks.Item Open Access Detecting compromised routers via packet forwarding behavior(2008) Mizrak, A.T.; Savage, S.; Marzullo, K.While it is widely understood that criminal miscreants are subverting large numbers of Internet-connected computers (e.g., for bots, spyware, SPAM forwarding), it is less well appreciated that Internet routers are also being actively targeted and compromised. Indeed, due to its central role in end-to-end communication, a compromised router can be leveraged to empower a wide range of direct attacks including eavesdropping, man-in-the-middle subterfuge, and denial of service. In response, a range of specialized anomaly detection protocols has been proposed to detect misbehaving packet forwarding between routers. This article provides a general framework for understanding the design space of this work and reviews the capabilities of various detection protocols. © 2008 IEEE.Item Open Access Fault-tolerant irregular topology design method for network-on-chips(IEEE, 2014) Tosun, S.; Ajabshir V.B.; Mercanoglu O.; Öztürk, ÖzcanAs the technology sizes of integrated circuits (ICs) scale down rapidly, current transistor densities on chips dramatically increase. While nanometer feature sizes allow denser chip designs in each technology generation, fabricated ICs become more susceptible to wear-outs, causing operation failure. Even a single link failure within an on-chip fabric can halt communication between application blocks, which makes the entire chip useless. In this study, we aim to make faulty chips designed with Network-on-Chip (NoC) communication usable. Specifically, we present a fault-tolerant irregular topology generation method for application specific NoC designs. Designed NoC topology allows a different routing path if there is a link failure on the default routing. We compare fault-tolerant topologies with regular fault-tolerant ring topologies, and non-fault-tolerant application specific irregular topologies on energy consumption, performance, and area using multimedia benchmarks and custom-generated graphs. © 2014 IEEE.Item Open Access Fault-tolerant topology generation method for application-specific network-on-chips(Institute of Electrical and Electronics Engineers, 2015) Tosun, S.; Ajabshir, V. B.; Mercanoglu, O.; Ozturk, O.As the technology sizes of integrated circuits (ICs) scale down rapidly, current transistor densities on chips dramatically increase. While nanometer feature sizes allow denser chip designs in each technology generation, fabricated ICs become more susceptible to wear-outs, causing operation failure. Even a single link failure within an on-chip fabric can halt communication between application blocks, which makes the entire chip useless. In this paper, we aim to make faulty chips designed with network-on-chip (NoC) communication usable. Specifically, we present fault-tolerant irregular topology-generation method for application-specific NoC designs. Designed NoC topology allows different routing path if there is a link failure on the default routing path. Additionally, we present a simulated annealing-based application mapping algorithm aiming to minimize total energy consumption of the NoC design. We compare fault-tolerant topologies with nonfault-tolerant application-specific irregular topologies on energy consumption, performance, and area using multimedia benchmarks and custom-generated graphs. Our results demonstrate that our method is able to determine fault-tolerant topologies with negligible area increase and better energy values.Item Open Access FPGA implementation of a fault-tolerant application-specific NoC design(IEEE, 2016-04) Yeşil, Şerif; Tosun, S.; Öztürk, ÖzcanToday's integrated circuits are more susceptible to permanent link failures than before as a result of diminishing technology sizes. Even a single link failure can make an entire chip useless. Single link failure problem is fatal to application-specific Network-on-Chip (NoC) designs as well if they cannot tolerate such failures. One solution to this problem can be having alternative routing options on the network for each communicating pair. In this study, we present an FPGA implementation of such a method for application-specific NoCs. This method adds additional network resources to the non-fault-tolerant design in an attempt to make it fault-tolerant. We show the effects of the presented fault-tolerant method on an FPGA implementation of Mp3 encoder based on energy consumption and area increase against non-fault-tolerant case. © 2016 IEEE.Item Open Access An ILP formulation for application mapping onto Network-on-Chips(IEEE, 2009) Tosun, S.; Öztürk, Özcan; Ozen, M.Ever shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems suffer from signal propagation delays, signal integrity, and scalability. Network-on-Chip (NoC) is the biggest step towards the communication bottleneck of System-on-Chip (SoC) architectures. In this paper, we present an Integer Linear Programming (ILP) formulation for application mapping onto mesh based Network-on-Chips to minimize the energy consumption of the system. The proposed method obtains optimal or close to optimal results within the given computation time limit. We also experimentally investigate the impact of the size of the mesh architecture on the application mapping and total communication. ©2009 IEEE.Item Open Access ILP-based communication reduction for heterogeneous 3D network-on-chips(IEEE, 2013-02-03) Aktürk, İsmail; Öztürk, ÖzcanNetwork-on-Chip (NoC) architectures and three-dimensional integrated circuits (3D ICs) have been introduced as attractive options for overcoming the barriers in interconnect scaling while increasing the number of cores. Combining these two approaches is expected to yield better performance and higher scalability. This paper explores the possibility of combining these two techniques in a heterogeneity aware fashion. We explore how heterogeneous processors can be mapped onto the given 3D chip area to minimize the data access costs. Our initial results indicate that the proposed approach generates promising results within tolerable solution times. © 2013 IEEE.Item Open Access On the design of AQM supporting TCP flows using robust control theory(IEEE, 2004) Quet, P-F.; Özbay, HitayRecently it has been shown that the active queue management schemes implemented in the routers of communication networks supporting transmission control protocol (TCP) flows can be modeled as a feedback control system. Based on a delay differential equations model of TCPs congestion-avoidance mode different control schemes have been proposed. Here a robust controller is designed based on the known techniques for H∞ control of systems with time delays.Item Open Access Power efficient data gathering and aggregation in wireless sensor networks(Association for Computing Machinery, 2003) Tan, H. Ö.; Körpeoǧlu, İ.Recent developments in processor, memory and radio technology have enabled wireless sensor networks which are deployed to collect useful information from an area of interest The sensed data must be gathered and transmitted to a base station where it is further processed for end-user queries. Since the network consists of low-cost nodes with limited battery power, power efficient methods must be employed for data gathering and aggregation in order to achieve long network lifetimes. In an environment where in a round of communication each of the sensor nodes has data to send to a base station, it is important to minimize the total energy consumed by the system in a round so that the system lifetime is maximized. With the use of data fusion and aggregation techniques, while minimizing the total energy per round, if power consumption per node can be balanced as well, a near optimal data gathering and routing scheme can be achieved in terms of network lifetime. So far, besides the conventional protocol of direct transmission, two elegant protocols called LEACH and PEGASIS have been proposed to maximize the lifetime of a sensor network. In this paper, we propose two new algorithms under name PEDAP (Power Efficient Data gathering and Aggregation Protocol), which are near optimal minimum spanning tree based routing schemes, where one of them is the power-aware version of the other. Our simulation results show that our algorithms perform well both in systems where base station is far away from and where it is in the center of the field. PEDAP achieves between 4x to 20x improvement in network lifetime compared with LEACH, and about three times improvement compared with PEGASIS.Item Open Access A variable structure control approach to active queue management for TCP with ECN(Institute of Electrical and Electronics Engineers, 2005) Yan, P.; Gao, Y.; Özbay, HitayIt has been shown that the transmission control protocol (TCP) connections through the congested routers can be modeled as a feedback dynamic system. In this paper we design a variable structure (VS) based control scheme in active queue management (AQM) supporting explicit congestion notification (ECN). By analyzing the robustness and performance of the control scheme for the nonlinear TCP/AQM model, we show that the proposed design has good performance and robustness with respect to the uncertainties of the round-trip time (RTT) and the number of active TCP sessions, which are central to the notion of AQM. Implementation issues are discussed and ns simulations are provided to validate the design and compare its performance to other peer schemes' in different scenarios. The results show that the proposed design significantly outperforms the peer AQM schemes in terms of packet loss ratio, throughput and buffer fluctuation.Item Open Access Voltage island based heterogeneous NoC design through constraint programming(Pergamon Press, 2014) Demiriz, A.; Bagherzadeh, N.; Ozturk, O.This paper discusses heterogeneous Network-on-Chip (NoC) design from a Constraint Programming (CP) perspective and extends the formulation to solving Voltage-Frequency Island (VFI) problem. In general, VFI is a superior design alternative in terms of thermal constraints, power consumption as well as performance considerations. Given a Communication Task Graph (CTG) and subsequent task assignments for cores, cores are allocated to the best possible places on the chip in the first stage to minimize the overall communication cost among cores. We then solve the application scheduling problem to determine the optimum core types from a list of technological alternatives and to minimize the makespan. Moreover, an elegant CP model is proposed to solve VFI problem by mapping and grouping cores at the same time with scheduling the computation tasks as a limited capacity resource allocation model. The paper reports results based on real benchmark datasets from the literature.Item Open Access A zone-based shared-tree multicast protocol for mobile ad hoc networks(IEEE, 2003) Rangnekar, A.; Zhang, Y.; Selçuk, Ali A.; Bicak, A.; Devarapalli V.; Sidhu, D.This paper proposes a new multicast protocol for mobile ad hoc networks (MANETs). The proposed protocol, Shared-Tree MZR, is a shared tree variant of the Multicast Routing Protocol based on Zone Routing (MZR). The concept of zone-based multicast routing for mobile ad hoc networks was originally proposed in MZR. The new protocol utilizes the advantages of the shared-tree together with the advantages of the zone-based routing. The performance of the protocol is analyzed for various network conditions. The test results show that the new protocol performs well and has significantly low overhead in scenarios with multiple sources.