Browsing by Subject "Series resistances"

Now showing 1 - 7 of 7

Open Access
Capacitance-conductance-current-voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures
(Elsevier Ltd, 2015) Turut, A.; Karabulut, A.; Ejderha, K.; Bıyıklı, Necmi
We have studied the admittance and current–voltage characteristics of the Au/Ti/Al2O3/nGaAs structure. The Al2O3 layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance Rs. It has been seen that the noncorrection characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 901 independent of the measurement frequency.
Open Access
The effect of insulator layer thickness on the main electrical parameters in (Ni/Au)/AlxGa1-xN/AIN/GaN heterostructures
(Wiley, 2010) Altindal, S.; Şafak, Y.; Taşçloǧlu I.; Özbay, Ekmel
(Ni/Au)Alx Ga1-x N/AlN/GaN(x = 0.22) heterostructures with and without a passivation layer of the SiNx were fabricated in order to see the effect of the insulator layer on the main electrical parameters such as zero-bias barrier height (BH) (φBO), ideality factor (n), series resistance (Rs) of the structure, and the interface state density (Nss). Some of these parameters were determined from both I-V and admittance (C-V and G/ω-V) measurements at room temperature and at 1 MHz and were compared. The experimental results show that the value of N ss in a Schottky contact without passivation is nearly 1 order of magnitude larger than that in a Schottky contact with SiNx passivation layers. Also, the values of Rs increase with the increasing thickness of the passivation layer. In the forward bias region, the negative values of capacitance are an attractive result of this study. This negative capacitance disappears in presence of the passivation layer. Copyright © 2010 John Wiley & Sons, Ltd.
Open Access
Electrical characterization of MS and MIS structures on AlGaN/AlN/GaN heterostructures
(ELSEVIER, 2010) Arslan, E.; Bütün, S.; Şafak, Y.; Uslu, H.; Tascioglu I.; Altindal, S.; Özbay, Ekmel
The forward and reverse bias I-V, C-V, and G/ω-V characteristics of (Ni/Au) Schottky barrier diodes (SBDs) on the Al 0.22Ga 0.78N/AlN/GaN high-electron-mobility-transistor (HEMTs) without and with SiN x insulator layer were measured at room temperature in order to investigate the effects of the insulator layer (SiN x) on the main electrical parameters such as the ideality factor (n), zero-bias barrier height ( B0), series resistance (R s), interface-state density (N ss). The energy density distribution profiles of the N ss were obtained from the forward bias I-V characteristics by taking into account the voltage dependence of the effective barrier height ( e) and ideality factor (n V) of devices. In addition, the N ss as a function of E c-E ss was determined from the low-high frequency capacitance methods. It was found that the values of N ss and R s in SBD HEMTs decreases with increasing insulator layer thickness.
Open Access
High performance n-MOSFETs with novel source/drain on selectively grown Ge on Si for monolithic integration
(IEEE, 2009) Yu, H.-Y.; Kobayashi, M.; Jung, W. S.; Okyay, Ali Kemal; Nishi, Y.; Saraswat, K. C.
We demonstrate high performance Ge n-MOSFETs with novel raised source/drain fabricated on high quality single crystal Ge selectively grown heteroepitaxially on Si using Multiple Hydrogen Anealing for Heteroepitaxy(MHAH) technique. Until now low source/drain series resistance in Ge n-MOSFETs has been a highly challenging problem. Source and drain are formed by implant-free, in-situ doping process for the purpose of very low series resistance and abrupt and shallow n+/p junctions. The novel n-MOSFETs show among the highest electron mobility reported on (100) Ge to-date. Furthermore, these devices provide an excellent Ion/Ioff ratio(4× 103) with very high Ion of 3.23μA/μm. These results show promise towards monolithic integration of Ge MOSFETs with Si CMOS VLSI platform.
Open Access
Imaging capability of pseudomorphic high electron mobility transistors, AlGaN/GaN, and Si micro-Hall probes for scanning Hall probe microscopy between 25 and 125 °c
(American Vacuum Society, 2009) Akram, R.; Dede, M.; Oral, A.
The authors present a comparative study on imaging capabilities of three different micro-Hall probe sensors fabricated from narrow and wide band gap semiconductors for scanning hall probe microscopy at variable temperatures. A novel method of quartz tuning fork atomic force microscopy feedback has been used which provides extremely simple operation in atmospheric pressures, high-vacuum, and variable-temperature environments and enables very high magnetic and reasonable topographic resolution to be achieved simultaneously. Micro-Hall probes were produced using optical lithography and reactive ion etching process. The active area of all different types of Hall probes were 1×1 μ m2. Electrical and magnetic characteristics show Hall coefficient, carrier concentration, and series resistance of the hall sensors to be 10 mG, 6.3× 1012 cm-2, and 12 k at 25 °C and 7 mG, 8.9× 1012 cm-2 and 24 k at 125 °C for AlGaNGaN two-dimensional electron gas (2DEG), 0.281 mG, 2.2× 1014 cm-2, and 139 k at 25 °C and 0.418 mG, 1.5× 1014 cm-2 and 155 k at 100 °C for Si and 5-10 mG, 6.25× 1012 cm-2, and 12 k at 25 °C for pseudomorphic high electron mobility transistors (PHEMT) 2DEG Hall probe. Scan of magnetic field and topography of hard disc sample at variable temperatures using all three kinds of probes are presented. The best low noise image was achieved at temperatures of 25, 100, and 125 °C for PHEMT, Si, and AlGaNGaN Hall probes, respectively. This upper limit on the working temperature can be associated with their band gaps and noise associated with thermal activation of carriers at high temperatures.
Open Access
On the profile of frequency and voltage dependent interface states and series resistance in (Ni/Au)/Al0.22Ga0.78N/AlN/GaN heterostructures by using current-voltage (I-V) and admittance spectroscopy methods
(Elsevier, 2011-06-08) Demirezen, S.; Altindal, S.; Özelik, S.; Özbay, Ekmel
In order to explain the experimental effect of interface states (N ss) and series resistance (Rs) of device on the non-ideal electrical characteristics, current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of (Ni/Au)/Al 0.22Ga0.78N/AlN/GaN heterostructures were investigated at room temperature. Admittance measurements (C-V and G/ω-V) were carried out in frequency and bias voltage ranges of 2 kHz-2 MHz and (-5 V)-(+5 V), respectively. The voltage dependent Rs profile was determined from the I-V data. The increasing capacitance behavior with the decreasing frequency at low frequencies is a proof of the presence of interface states at metal/semiconductor (M/S) interface. At various bias voltages, the ac electrical conductivity (σac) is independent from frequencies up to 100 kHz, and above this frequency value it increases with the increasing frequency for each bias voltage. In addition, the high-frequency capacitance (C m) and conductance (Gm/ω) values measured under forward and reverse bias were corrected to minimize the effects of series resistance. The results indicate that the interfacial polarization can more easily occur at low frequencies. The distribution of Nss and R s is confirmed to have significant effect on non-ideal I-V, C-V and G/ω-V characteristics of (Ni/Au)/Al0.22Ga0.78N/AlN/ GaN heterostructures.
Open Access
Ta/Si Schottky diodes fabricated by magnetron sputtering technique
(2010) Ocak, Y.S.; Genisel, M.F.; Kiliçoǧlu, T.
Electrical properties of Ta/n-Si and Ta/p-Si Schottky barrier diodes obtained by sputtering of tantalum (Ta) metal on semiconductors have been investigated. The characteristic parameters of these contacts like barrier height, ideality factor and series resistance have been calculated using current voltage (I-V) measurements. It has seen that the diodes have ideality factors more than unity and the sum of their barrier heights is 1.21 eV which is higher than the band gap of the silicon (1.12 eV). The results have been attributed the effects of inhomogeneities at the interface of the devices and native oxide layer. In addition, the barrier height values determined using capacitance-voltage (C-V) measurements have been compared the ones obtained from I-V measurements. It has seen that the interface states have strong effects on electrical properties of the diodes such as C-V and Rs-V measurements. © 2010 Elsevier Ltd. All rights reserved.