Workload clustering for increasing energy savings on embedded MPSOCS

Date

2012

Authors

Ozturk, O.
Kandemir, M.
Narayanan, S. H. K.

Editor(s)

Advisor

Supervisor

Co-Advisor

Co-Supervisor

Instructor

Source Title

Energy-Efficient Distributed Computing Systems

Print ISSN

Electronic ISSN

Publisher

John Wiley and Sons

Volume

Issue

Pages

157 - 160

Language

English

Journal Title

Journal ISSN

Volume Title

Series

Abstract

Voltage/frequency scaling andprocessor low-power modes (i.e., processor shut-down) are two important mechanisms usedfor reducing energy consumption in embedded MPSoCs. While a unified scheme that combines these two mechanisms can achieve significant savings in some cases, such an approach is limited by the code parallelization strategy employed. In this paper, we propose a novel, integer linear programming (ILP) based workload clustering strategy across parallel processors, oriented towards maximizing the number of idle processors without impacting original execution times. These idle processors can then be switched to a low power mode to maximize energy savings, whereas the remaining ones can make use ofvoltage/frequency scaling. In order to check whether this approach brings any energy benefits over the pure voltage scaling based, pure processor shut-down based, or a simple unified scheme, we implemented four different approaches and tested them using a set of eight array/loop-intensive embedded applications. Our simulation-based analysis reveals that the proposed ILP based approach (1) is very effective in reducing the energy consumptions of the applications tested and (2) generates much better energy savings than all the alternate schemes tested (including a unified scheme that combines voltage/frequency scaling and processor shutdown).

Course

Other identifiers

Book Title

Degree Discipline

Degree Level

Degree Name

Citation

Published Version (Please cite this version)