Low power Zinc-Oxide based charge trapping memory with embedded silicon nanoparticles

Date

2014

Editor(s)

Advisor

Supervisor

Co-Advisor

Co-Supervisor

Instructor

BUIR Usage Stats
1
views
6
downloads

Citation Stats

Series

Abstract

In this work, a bottom-gate charge trapping memory device with Zinc-Oxide (ZnO) channel and 2-nm Si nanoparticles (Si-NPs) embedded in ZnO charge trapping layer is demonstrated. The active layers of the memory device are deposited by atomic layer deposition (ALD) and the Si-NPs are deposited by spin coating. The Si-NPs memory exhibits a threshold voltage (Vt) shift of 6.3 V at an operating voltage of -10/10 V while 2.6 V Vt shift is obtained without nanoparticles confirming that the Si-NPs act as energy states within the bandgap of the ZnO layer. In addition, a 3.4 V Vt is achieved at a very low operating voltage of -1 V/1 V due to the charging of the Si-NPs through Poole-Frenkel emission mechanism at an electric field across the tunnel oxide E > 0.36 MV/cm. The results highlight a promising technology for future ultra-low power memory devices.

Source Title

ECS Transactions

Publisher

ECS

Course

Other identifiers

Book Title

Degree Discipline

Degree Level

Degree Name

Citation

Published Version (Please cite this version)

Language

English