Architecture for safety–critical transportation systems

buir.contributor.authorAhangari, Hamzeh
buir.contributor.authorOzturk, Ozcan
buir.contributor.orcidAhangari, Hamzeh|0000-0001-9272-816X
dc.citation.epage11en_US
dc.citation.spage1
dc.citation.volumeNumber98
dc.contributor.authorAhangari, Hamzeh
dc.contributor.authorÖzkök, Yusuf İbrahim
dc.contributor.authorYıldırım, Asil
dc.contributor.authorSay, Fatih
dc.contributor.authorAtık, Funda
dc.contributor.authorOzturk, Ozcan
dc.date.accessioned2024-03-06T06:13:10Z
dc.date.available2024-03-06T06:13:10Z
dc.date.issued2023-03-15
dc.departmentDepartment of Computer Engineering
dc.description.abstractIn many industrial systems, including transportation, fault tolerance is a key requirement. Usually, faulttolerance is achieved by redundancy, where replication of critical components is used. In the case oftransportation computing systems, this redundancy starts with the processing element. In this paper, we useMarkov models to assess the level of safety with different redundancy techniques used in the literature. Morespecifically, we give implementation details for various architecture options and evaluate one out of two (1oo2)and two out of three (2oo3) implementations. We observe that both 1oo2 and 2oo3 can reduce the averageprobability of failure per hour (PFH) down to 10−7 which provides Level-3 (SIL3) safety according to thestandards.
dc.embargo.release2025-03-15
dc.identifier.doi10.1016/j.micpro.2023.104818en_US
dc.identifier.issn1419331en_US
dc.identifier.urihttps://hdl.handle.net/11693/114354en_US
dc.language.isoEnglishen_US
dc.publisherElsevier B.V.en_US
dc.relation.isversionofhttps://dx.doi.org/10.1016/j.micpro.2023.104818
dc.source.titleMicroprocessors and Microsystems
dc.subjectReliability
dc.subjectSafety
dc.subjectRedundancy
dc.subjectTransportation
dc.titleArchitecture for safety–critical transportation systems
dc.typeArticle

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