Browsing by Subject "CMOS"

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    Analog CMOS implementation of cellular neural networks
    (1991) Baktır, İzzet Adil
    An analog CMOS circuit realization of cellular neural networks with transconductance elements is presented in this thesis. This realization can be easily adapted to various types of applications in image processing by just choosing the appropriate transconductance parameters according to the predetermined coefficients. The noise-reduction and edge detection examples have shown the effectiveness of the designed networks in real time image processing applications. For “fix function” cellular neural network circuits the number of transistors are reduced further by a new multi-input voltage-controlled current source.
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    Analysis of HfO2 and ZrO2 as high-K dielectric for CMOS nano devices
    (Institute of Electrical and Electronics Engineers, 2022-05-16) Hasan, T.; Zafar, Salahuddin; Özbay, Ekmel; Kashif, A. U.
    An analysis has been made on high-K dielectrics (HfO 2 and ZrO 2) for the CMOS process up to 14 nm FAB technology node. The aim is to study the reduction in gate leakage current for Nano-scale devices. High-K Dielectric having K ≥ 20 is beneficial for CMOS Nano-devices, reducing the gate leakage current when EOT ≤ 0.5 nm. MOS structure with high-K, i.e., HfO 2 and ZrO 2 , has been simulated in SILVACO T-CAD to consider as gate stack: metal/oxide/p-Si for the different FAB nodes; 45, 32, 22 & 14 nm. SiO 2 is considered a reference to optimize the MOS structure with high-K dielectric. As a result, 7–8 times the higher physical gate oxide layer is achieved compared to SiO 2 , which has a significant impact on minimizing the gate leakage current.
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    Cross-coupled CMOS voltage controlled oscillators operating in the X-band
    (2023-06) Soygür, Can
    Voltage controlled oscillators (VCOs) are electronic devices whose oscillation frequencies can be tuned by applying an external control input. A widely preferred topology is the cross-coupled VCO topology, which offers easy implementation inside integrated circuits. VCO designers take certain performance metrics into account for their designs, with the most prominent ones being the frequency tuning range and the output phase noise. These two metrics often require trading off from one another; as introducing more networks for tunability increases the overall noise within the device. With the aim of observing this trade-off between the tuning range and phase noise, four VCOs have been designed and fabricated in a single die with a 0.18 µm CMOS process. They are designed to operate in the X-band, at almost the same oscillation frequencies, to allow for easier comparison. Each VCO in the IC offers either more tunability with more tuning circuits or better phase noise performance with simpler circuits. Measurement results verify this hypothesis; a decrease in output phase noise is observed in the tested VCOs that contained simpler tuning network. With center frequencies of oscillation at approximately 12 GHz in the VCOs, tuning ranges as high as 25% are achieved in the VCO with most tunability, while phase noises as low as -106 dBm/Hz (at a 1 MHz offset) were achieved in the one with no tunability.
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    Mic-in-CMOS: CMUT as a sealed-gap capacitive microphone
    (IEEE, 2020) Köymen, Hayrettin; Ahiska, Y.; Atalar, Abdullah; Köymen, I.; Taşdelen, A .Sinan; Yılmaz, Mehmet
    The design and production of a CMOS compatible, watertight and ingress-proof CMUT (capacitive micromachined ultrasonic transducer) microphone, mic-in-CMOS, with vacuum-gap is described. We present an analytical model-based approach for the design of mic-in-CMOS, where a basis for quantitative comparison of performance trade-offs is provided. The sealed vacuum gap of the mic-in-CMOS is basically a lossless sensor, free of mechanical noise. Its SNR is determined by the noise of the pre-amplification electronics (the noise contributor in a CMUT with vacuum gap is essentially the radiation resistance, which is less than 0 dBA for audio band for a 1 mm2 device). The design of mic-in-CMOS involves many multilateral trade-offs such as gap height vs membrane thickness vs sensitivity vs need for linear operation vs bias voltage and atmospheric depression, to name few. The mic-inCMOS design can be mass produced using CMOS film stacks only, as such the fabrication process can be carried out entirely in a CMOS processes production line complemented with CMOS compatible post-processing approaches. Mic-inCMOS has the advantage of low production cost with minimal packaging requirement and on-die EMI / EMC.
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    Novel filters for sigma-delta A/D conversion
    (1992) Kolağasıoğlu, A. Ertuğrul
    Oversampled data conversion techniques based on sigma-delta modulation lias an increasing popularity. The main reason behind this fact is the recent developments in VLSI technologies especially in CMOS VLSI. These kind of converters have several advantages such as robustness, no trimming, no error correction, good noise performcince. etc. This thesis presents .several kinds of high resolution converter structures. It states advantages of second order sigma-delta conversion technique. hollowing this discussion, a new implementation of the second order sigma-delta modulation with a single feedback loop is introduced which can be imiilemented in a smaller area.. The performance, of the system is estimated with some digital decimation filters, one of which is an extended version of standard .smA filter that can be integrated in a chip with a small die size.