Browsing by Author "Hasan, T."

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    All-fiber nonlinearity-and dispersion-managed dissipative soliton nanotube mode-locked laser
    (American Institute of Physics, 2015) Zhang Z.; Popa, D.; Wittwer, V. J.; Milana, S.; Hasan, T.; Jiang, Z.; Ferrari, A. C.; Ilday F. Ö.
    We report dissipative soliton generation from an Yb-doped all-fiber nonlinearity- and dispersion-managed nanotube mode-locked laser. A simple all-fiber ring cavity exploits a photonic crystal fiber for both nonlinearity enhancement and dispersion compensation. The laser generates stable dissipative solitons with large linear chirp in the net normal dispersion regime. Pulses that are 8.7 ps long are externally compressed to 118 fs, outperforming current nanotube-based Yb-doped fiber laser designs.
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    All-fiber Yb-doped laser mode-locked by nanotubes
    (IEEE, 2013) Zhang, Zewang; Popa, D.; Sun, Z.; Hasan, T.; Ferrari, A.C.; İlday, F. Ömer
    Single-wall carbon nanotubes (SWNTs) and graphene have emerged as promising saturable absorbers (SAs), due to their broad operation bandwidth and fast recovery times [1-3]. However, Yb-doped fiber lasers mode-locked using CNT and graphene SAs have generated relatively long pulses. All-fiber cavity designs are highly favored for their environmental robustness. Here, we demonstrate an all-fiber Yb-doped laser based on a SWNT saturable absorber, which allows generation of 8.7 ps-long pulses, externally compressed to 118 fs. To the best of our knowledge, these are the shortest pulses obtained with SWNT SAs from a Yb-doped fiber laser. © 2013 IEEE.
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    Analysis of HfO2 and ZrO2 as high-K dielectric for CMOS nano devices
    (Institute of Electrical and Electronics Engineers, 2022-05-16) Hasan, T.; Zafar, Salahuddin; Özbay, Ekmel; Kashif, A. U.
    An analysis has been made on high-K dielectrics (HfO 2 and ZrO 2) for the CMOS process up to 14 nm FAB technology node. The aim is to study the reduction in gate leakage current for Nano-scale devices. High-K Dielectric having K ≥ 20 is beneficial for CMOS Nano-devices, reducing the gate leakage current when EOT ≤ 0.5 nm. MOS structure with high-K, i.e., HfO 2 and ZrO 2 , has been simulated in SILVACO T-CAD to consider as gate stack: metal/oxide/p-Si for the different FAB nodes; 45, 32, 22 & 14 nm. SiO 2 is considered a reference to optimize the MOS structure with high-K dielectric. As a result, 7–8 times the higher physical gate oxide layer is achieved compared to SiO 2 , which has a significant impact on minimizing the gate leakage current.