Design and implementation of a general-purpose median filter unit in CMOS VLSI

A general-purpose median filter unit configuration is proposed in the form of two single-chip median filters, one extensible and one real-time. The networks of the chips are pipelined and systolic at bit level and based on the odd/even transposition sorting. The chips are implemented in 3-μm standard CMOS by using full-custom VLSI design techniques. The exact median of elements, in a window size w = 9 with arbitrary word length L, can be found by using only one extensible median filter chip. The filter can be extended to arbitrary window size and word lengths by using many chips. For w > 9 with arbitrary L, the number of chips required to find the exact medians is no more than the smallest greater integer of (w/9)2. Simulation results show that the extensible median filter chip can be clocked up to 40 MHz, and generate 30/L megamedians per second. On the other hand, the real-time median filter chip can find the exact running medians of elements in a window of a fixed size w = 9 with L = 8. According to simulations, it can generate up to 50 megamedians per second with a 50-MHz clock. The chips can be used for the realization of various median filtering techniques. In this paper, the algorithms, VLSI implementations, and testing of the chips are presented together with some possible applications. 0018-9200/90/0400-0505$01.00 © 1990 IEEE