Two exact formulations for disassembly line balancing problems with task precedence diagram construction using an AND/OR graph
dc.citation.epage | 881 | en_US |
dc.citation.issueNumber | 10 | en_US |
dc.citation.spage | 866 | en_US |
dc.citation.volumeNumber | 41 | en_US |
dc.contributor.author | Koc, A. | en_US |
dc.contributor.author | Sabuncuoglu, I. | en_US |
dc.contributor.author | Erel, E. | en_US |
dc.date.accessioned | 2016-02-08T10:01:01Z | |
dc.date.available | 2016-02-08T10:01:01Z | |
dc.date.issued | 2009 | en_US |
dc.department | Department of Industrial Engineering | en_US |
dc.department | Faculty of Business Administration | en_US |
dc.description.abstract | In this paper, the disassembly line balancing problem, which involves determining a line design in which used products are completely disassembled to obtain useable components in a cost-effective manner, is studied. Because of the growing demand for a cleaner environment, this problem has become an important issue in reverse manufacturing. In this study, two exact formulations are developed that utilize an AND/OR Graph (AOG) as the main input to ensure the feasibility of the precedence relations among the tasks. It is also shown that traditional task precedence diagrams can be derived from the AOG of a given product structure. This procedure leads to considerably better solutions of the traditional assembly line balancing problems; it may alter the approach taken by previous researchers in this area. | en_US |
dc.description.provenance | Made available in DSpace on 2016-02-08T10:01:01Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 2009 | en |
dc.identifier.doi | 10.1080/07408170802510390 | en_US |
dc.identifier.eissn | 1545-8830 | |
dc.identifier.issn | 0740-817X | |
dc.identifier.uri | http://hdl.handle.net/11693/22507 | |
dc.language.iso | English | en_US |
dc.publisher | Taylor & Francis | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1080/07408170802510390 | en_US |
dc.source.title | IIE Transactions | en_US |
dc.subject | Disassembly line balancing | en_US |
dc.subject | Assembly line balancing | en_US |
dc.subject | Task precedence diagram | en_US |
dc.subject | AND/OR graph | en_US |
dc.title | Two exact formulations for disassembly line balancing problems with task precedence diagram construction using an AND/OR graph | en_US |
dc.type | Article | en_US |
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