Circuit partitioning using mean field annealing
buir.contributor.author | Aykanat, Cevdet | |
dc.citation.epage | 194 | en_US |
dc.citation.issueNumber | 2 | en_US |
dc.citation.spage | 171 | en_US |
dc.citation.volumeNumber | 8 | en_US |
dc.contributor.author | Bultan, T. | en_US |
dc.contributor.author | Aykanat, Cevdet | en_US |
dc.date.accessioned | 2016-02-08T10:52:03Z | |
dc.date.available | 2016-02-08T10:52:03Z | en_US |
dc.date.issued | 1995 | en_US |
dc.department | Department of Computer Engineering | en_US |
dc.description.abstract | Mean field annealing (MFA) algorithm, proposed for solving combinatorial optimization problems, combines the characteristics of neural networks and simulated annealing. Previous works on MFA resulted with successful mapping of the algorithm to some classic optimization problems such as traveling salesperson problem, scheduling problem, knapsack problem and graph partitioning problem. In this paper, MFA is formulated for the circuit partitioning problem using the so called net-cut model. Hence, the deficiencies of using the graph representation for electrical circuits are avoided. An efficient implementation scheme, which decreases the complexity of the proposed algorithm by asymptotical factors is also developed. Comparative performance analysis of the proposed algorithm with two wellknown heuristics, simulated annealing and Kernighan-Lin, indicates that MFA is a successful alternative heuristic for the circuit partitioning problem. © 1995. | en_US |
dc.description.provenance | Made available in DSpace on 2016-02-08T10:52:03Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 1995 | en_US |
dc.identifier.doi | 10.1016/0925-2312(94)00016-L | en_US |
dc.identifier.eissn | 1872-8286 | en_US |
dc.identifier.issn | 0925-2312 | en_US |
dc.identifier.uri | http://hdl.handle.net/11693/25900 | en_US |
dc.language.iso | English | en_US |
dc.publisher | Elsevier | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1016/0925-2312(94)00016-L | en_US |
dc.source.title | Neurocomputing | en_US |
dc.subject | Algorithms | en_US |
dc.subject | Combinatorial Mathematics | en_US |
dc.subject | Graph Theory | en_US |
dc.subject | Heuristic Methods | en_US |
dc.subject | Mathematical Models | en_US |
dc.subject | Networks (Circuits) | en_US |
dc.subject | Optimization | en_US |
dc.subject | Performance | en_US |
dc.subject | Simulated Annealing | en_US |
dc.subject | Asymptotical Factors | en_US |
dc.subject | Circuit Partitioning | en_US |
dc.subject | Kernighan-Lin | en_US |
dc.subject | Mean Field Annealing | en_US |
dc.subject | Net-Cut Model | en_US |
dc.subject | Neural networks | en_US |
dc.subject | Article | en_US |
dc.subject | Computer Model | en_US |
dc.subject | Cost | en_US |
dc.subject | Electric Activity | en_US |
dc.subject | Mathematical Analysis | en_US |
dc.subject | Mathematical Computing | en_US |
dc.subject | Partition Coefficient | en_US |
dc.subject | Priority Journal | en_US |
dc.subject | Problem Solving | en_US |
dc.subject | Theory | en_US |
dc.title | Circuit partitioning using mean field annealing | en_US |
dc.type | Article | en_US |
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