Circuit partitioning using mean field annealing

buir.contributor.authorAykanat, Cevdet
dc.citation.epage194en_US
dc.citation.issueNumber2en_US
dc.citation.spage171en_US
dc.citation.volumeNumber8en_US
dc.contributor.authorBultan, T.en_US
dc.contributor.authorAykanat, Cevdeten_US
dc.date.accessioned2016-02-08T10:52:03Z
dc.date.available2016-02-08T10:52:03Zen_US
dc.date.issued1995en_US
dc.departmentDepartment of Computer Engineeringen_US
dc.description.abstractMean field annealing (MFA) algorithm, proposed for solving combinatorial optimization problems, combines the characteristics of neural networks and simulated annealing. Previous works on MFA resulted with successful mapping of the algorithm to some classic optimization problems such as traveling salesperson problem, scheduling problem, knapsack problem and graph partitioning problem. In this paper, MFA is formulated for the circuit partitioning problem using the so called net-cut model. Hence, the deficiencies of using the graph representation for electrical circuits are avoided. An efficient implementation scheme, which decreases the complexity of the proposed algorithm by asymptotical factors is also developed. Comparative performance analysis of the proposed algorithm with two wellknown heuristics, simulated annealing and Kernighan-Lin, indicates that MFA is a successful alternative heuristic for the circuit partitioning problem. © 1995.en_US
dc.description.provenanceMade available in DSpace on 2016-02-08T10:52:03Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 1995en_US
dc.identifier.doi10.1016/0925-2312(94)00016-Len_US
dc.identifier.eissn1872-8286en_US
dc.identifier.issn0925-2312en_US
dc.identifier.urihttp://hdl.handle.net/11693/25900en_US
dc.language.isoEnglishen_US
dc.publisherElsevieren_US
dc.relation.isversionofhttp://dx.doi.org/10.1016/0925-2312(94)00016-Len_US
dc.source.titleNeurocomputingen_US
dc.subjectAlgorithmsen_US
dc.subjectCombinatorial Mathematicsen_US
dc.subjectGraph Theoryen_US
dc.subjectHeuristic Methodsen_US
dc.subjectMathematical Modelsen_US
dc.subjectNetworks (Circuits)en_US
dc.subjectOptimizationen_US
dc.subjectPerformanceen_US
dc.subjectSimulated Annealingen_US
dc.subjectAsymptotical Factorsen_US
dc.subjectCircuit Partitioningen_US
dc.subjectKernighan-Linen_US
dc.subjectMean Field Annealingen_US
dc.subjectNet-Cut Modelen_US
dc.subjectNeural networksen_US
dc.subjectArticleen_US
dc.subjectComputer Modelen_US
dc.subjectCosten_US
dc.subjectElectric Activityen_US
dc.subjectMathematical Analysisen_US
dc.subjectMathematical Computingen_US
dc.subjectPartition Coefficienten_US
dc.subjectPriority Journalen_US
dc.subjectProblem Solvingen_US
dc.subjectTheoryen_US
dc.titleCircuit partitioning using mean field annealingen_US
dc.typeArticleen_US

Files

Original bundle

Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
Circuit_partitioning_using_mean_field_annealing.pdf
Size:
1.46 MB
Format:
Adobe Portable Document Format
Description:
Full printable version