In this thesis, efficient parallelization of Digital Signal Processing (DSP) algorithms, (FFT, FHT and FCT), on multicomputers implementing the hypercube interconnection topology are investigated. The proposed algorithms, maintain perfect load-balance, minimize communication overhead, can overlap communications with computations and achieve regular computational patterns. The proposed parallel algorithms are implemented on Intel’s iPSC/2^ hypercube multicomputer with 32 processors. High efficiency and almost linear speedup values are obtained for even small size problems.