Optimizing doherty power amplifier output networks for maximized bandwidth
A method is presented to optimize the combining network and the post match-ing network of a Doherty power ampliﬁer for maximizing the bandwidth. For widely applicable results, RF power transistors are approximated in the large-signal regime using a simple analytical model with a few parameters. A deﬁni-tion of bandwidth of Doherty power ampliﬁer is given, which involves gain and eﬃciency at full-power and 6 dB backoﬀ. Diﬀerent combining network topologies are compared in terms of this bandwidth deﬁnition. The element values are op-timized using two factors, one to scale the combining node impedance and the other to scale the impedance seen by the transistors. For each optimized topol-ogy, explicit formulas are given resulting in the element values in terms of the optimized values and a few transistor parameters. The method presented also leads to a proper selection of the post-matching network.