A constructive multi-way circuit partitioning algorithm based on minimum degree ordering

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buir.advisorAykanat, Cevdet
dc.contributor.authorÇatalyürek, Ümit V
dc.date.accessioned2016-01-08T20:11:40Z
dc.date.available2016-01-08T20:11:40Z
dc.date.issued1994
dc.departmentDepartment of Computer Engineeringen_US
dc.descriptionAnkara : The Department of Computer Engineering and Information Science and the Institute of Engineering and Science of Bilkent Univ., 1994.en_US
dc.descriptionThesis (Master's) -- Bilkent University, 1994.en_US
dc.descriptionIncludes bibliographical references leaves 52-54.en_US
dc.description.abstractCircuit partitioning has many important applications in VLSI. Circuit partitioning problem can be most properly modeled as hypergraph partitioning. In this work, we propose a novel k-v/ay hypergraph partitioning heuristic using the Minimum Degree (MD) ordering which is a well-known heuristic for reducing the amount of fills in the factorization of symmetric sparse matrices. The proposed algorithm operates on the dual graph of the given hypergraph. The algorithm grows node-clusters on the dual graph which induce cell-clusters with locally minimum net-cut sizes. The quotient graph concept, widely used in MD ordering, is exploited for the sake of efficient implementation. The proposed algorithm outperforms well-known heuristics, such as Kernighan-Lin (KL) based algorithms and Simulated Annealing, in terms of solution quality on various VLSI benchmark circuits. A nice property of the proposed algorithm is that its execution time reduces with increasing k as opposed to the existing iterative heuristics. It is even faster than the fast KL-based algorithms on the partitioning of the benchmark circuits for k > 16.en_US
dc.description.degreeM.S.en_US
dc.description.provenanceMade available in DSpace on 2016-01-08T20:11:40Z (GMT). No. of bitstreams: 1 1.pdf: 78510 bytes, checksum: d85492f20c2362aa2bcf4aad49380397 (MD5)en
dc.description.statementofresponsibilityÇatalyürek, Ümit Ven_US
dc.format.extentxi, 54 leavesen_US
dc.identifier.urihttp://hdl.handle.net/11693/17591
dc.language.isoEnglishen_US
dc.publisherBilkent Universityen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectCircuit Partitioningen_US
dc.subjectHypergraph Partitioningen_US
dc.subjectDual Graphen_US
dc.subjectMinimum Degree Orderingen_US
dc.subjectQuotient Graphen_US
dc.subject.lccQA165 .C38 1994en_US
dc.subject.lcshPartitions (Mathematics).en_US
dc.subject.lcshHypergraph.en_US
dc.titleA constructive multi-way circuit partitioning algorithm based on minimum degree orderingen_US
dc.typeThesisen_US

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