Limit to bit-rate capacity of electrical interconnects from aspect ratio of system architecture

buir.contributor.authorHaldun M. Özaktaş
dc.citation.epage52en_US
dc.citation.issueNumber1en_US
dc.citation.spage42en_US
dc.citation.volumeNumber41en_US
dc.contributor.authorMiller, D. A. B.
dc.contributor.authorÖzaktaş, Haldun M.
dc.date.accessioned2015-07-28T11:56:07Z
dc.date.available2015-07-28T11:56:07Z
dc.date.issued1997-02-25en_US
dc.departmentDepartment of Electrical and Electronics Engineeringen_US
dc.description.abstractWe show that there is a limit to the total number of bits per second,B, of information that can flow in a simple digital electrical interconnection that is set only by the ratio of the lengthlof the interconnection to the total cross-sectional dimensionof the interconnect wiring—the “aspect ratio” of the interconnection. This limit is largely independent of the details of the design of the electrical lines. The limit is approximatelyB∼BoA/l2bits/s, withBo∼ 1015(bit/s) for high-performance strip lines and cables, ∼1016for small on-chip lines, and ∼1017–1018for equalized lines. Because the limit is scale-invariant, neither growing nor shrinking the system substantially changes the limit. Exceeding this limit requires techniques such as repeatering, coding, and multilevel modulation. Such a limit will become a problem as machines approach Tb/s information bandwidths. The limit will particularly affect architectures in which one processor must talk reasonably directly with many others. We argue that optical interconnects can solve this problem since they avoid the resistive loss physics that gives this limit.en_US
dc.description.provenanceMade available in DSpace on 2015-07-28T11:56:07Z (GMT). No. of bitstreams: 1 10.1006-jpdc.1996.1285.pdf: 279053 bytes, checksum: b98cc31df359a76f708b1a9a49850914 (MD5)en
dc.identifier.doi10.1006/jpdc.1996.1285en_US
dc.identifier.issn0743-7315
dc.identifier.urihttp://hdl.handle.net/11693/10863
dc.language.isoEnglishen_US
dc.publisherAcademic Pressen_US
dc.relation.isversionofhttp://dx.doi.org/10.1006/jpdc.1996.1285en_US
dc.source.titleJournal of Parallel and Distributed Computingen_US
dc.subjectMqw modulatorsen_US
dc.subjectTechnologiesen_US
dc.subjectCmosen_US
dc.titleLimit to bit-rate capacity of electrical interconnects from aspect ratio of system architectureen_US
dc.typeArticleen_US

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