Memory resident parallel inverted index construction
buir.contributor.author | Aykanat, Cevdet | |
dc.citation.epage | 105 | en_US |
dc.citation.spage | 99 | en_US |
dc.contributor.author | Küçükyılmaz, Tayfun | en_US |
dc.contributor.author | Türk, Ata | en_US |
dc.contributor.author | Aykanat, Cevdet | en_US |
dc.date.accessioned | 2016-02-08T12:10:38Z | |
dc.date.available | 2016-02-08T12:10:38Z | |
dc.date.issued | 2012 | en_US |
dc.department | Department of Computer Engineering | en_US |
dc.description | Conference name: 26th International Symposium on Computer and Information Sciences | en_US |
dc.description.abstract | Advances in cloud computing, 64-bit architectures and huge RAMs enable performing many search related tasks in memory.We argue that term-based partitioned parallel inverted index construction is among such tasks, and provide an efficient parallel framework that achieves this task. We show that by utilizing an efficient bucketing scheme we can eliminate the need for the generation of a global index and reduce the communication overhead without disturbing balancing constraint. We also propose and investigate assignment schemes that can further reduce communication overheads without disturbing balancing constraints. The conducted experiments indicate promising results. © 2012 Springer-Verlag London Limited. | en_US |
dc.description.provenance | Made available in DSpace on 2016-02-08T12:10:38Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 2012 | en |
dc.identifier.doi | 10.1007/978-1-4471-2155-8-12 | en_US |
dc.identifier.doi | 10.1007/978-1-4471-2155-8 | en_US |
dc.identifier.uri | http://hdl.handle.net/11693/28083 | |
dc.language.iso | English | en_US |
dc.publisher | Springer, London | en_US |
dc.relation.isversionof | https://doi.org/10.1007/978-1-4471-2155-8_12 | en_US |
dc.relation.isversionof | https://doi.org/10.1007/978-1-4471-2155-8 | en_US |
dc.source.title | Computer and Information Sciences II | en_US |
dc.subject | 64-bit architectures | en_US |
dc.subject | Communication overheads | en_US |
dc.subject | Global index | en_US |
dc.subject | Inverted indices | en_US |
dc.subject | Memory-resident | en_US |
dc.subject | Parallel framework | en_US |
dc.subject | Communication | en_US |
dc.subject | Information science | en_US |
dc.subject | Random access storage | en_US |
dc.subject | Cost reduction | en_US |
dc.title | Memory resident parallel inverted index construction | en_US |
dc.type | Conference Paper | en_US |
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