Shared scratch pad memory space management across applications
dc.citation.epage | 65 | en_US |
dc.citation.issueNumber | 1 | en_US |
dc.citation.spage | 54 | en_US |
dc.citation.volumeNumber | 4 | en_US |
dc.contributor.author | Ozturk, Ozcan | en_US |
dc.contributor.author | Kandemir, M. | en_US |
dc.contributor.author | Son, S. W. | en_US |
dc.contributor.author | Kolcu, I. | en_US |
dc.date.accessioned | 2016-02-08T10:03:06Z | |
dc.date.available | 2016-02-08T10:03:06Z | |
dc.date.issued | 2009 | en_US |
dc.department | Department of Computer Engineering | en_US |
dc.description.abstract | Scratch Pad Memories (SPMs) have received considerable attention lately as on-chip memory building blocks. The main characteristic that distinguishes an SPM from a conventional cache memory is that the data flow is controlled by software. The main focus of this paper is the management of an SPM space shared by multiple applications that can potentially share data. The proposed approach has three major components; a compiler analysis phase, a runtime space partitioner, and a local partitioning phase. Our experimental results show that the proposed approach leads to minimum completion time among all alternate memory partitioning schemes tested. | en_US |
dc.description.provenance | Made available in DSpace on 2016-02-08T10:03:06Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 2009 | en |
dc.identifier.doi | 10.1504/IJES.2009.027240 | en_US |
dc.identifier.eissn | 1741-1076 | en_US |
dc.identifier.issn | 1741-1068 | en_US |
dc.identifier.uri | http://hdl.handle.net/11693/22665 | en_US |
dc.language.iso | English | en_US |
dc.publisher | Inderscience Publishers | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1504/IJES.2009.027240 | en_US |
dc.source.title | International Journal of Embedded Systems | en_US |
dc.subject | Chip multiprocessor | en_US |
dc.subject | Building block | en_US |
dc.subject | Chip multiprocessor | en_US |
dc.subject | Compiler analysis | en_US |
dc.subject | Data flow | en_US |
dc.subject | Main characteristics | en_US |
dc.subject | Memory space management | en_US |
dc.subject | Minimum completion time | en_US |
dc.subject | Multiple applications | en_US |
dc.subject | On chip memory | en_US |
dc.subject | Parallel execution | en_US |
dc.subject | Runtime | en_US |
dc.subject | Scratch pad memory | en_US |
dc.subject | Microprocessor chips | en_US |
dc.subject | Multiprocessing systems | en_US |
dc.subject | Systems analysis | en_US |
dc.subject | Cache memory | en_US |
dc.title | Shared scratch pad memory space management across applications | en_US |
dc.type | Article | en_US |
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