Compiler-directed energy reduction using dynamic voltage scaling and voltage islands for embedded systems

Date
2013
Authors
Ozturk, O.
Kandemir, M.
Chen G.
Advisor
Supervisor
Co-Advisor
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Instructor
Source Title
IEEE Transactions on Computers
Print ISSN
0018-9340
Electronic ISSN
Publisher
Institute of Electrical and Electronics Engineers
Volume
62
Issue
2
Pages
268 - 278
Language
English
Type
Article
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Volume Title
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Abstract

Addressing power and energy consumption related issues early in the system design flow ensures good design and minimizes iterations for faster turnaround time. In particular, optimizations at software level, e.g., those supported by compilers, are very important for minimizing energy consumption of embedded applications. Recent research demonstrates that voltage islands provide the flexibility to reduce power by selectively shutting down the different regions of the chip and/or running the select parts of the chip at different voltage/frequency levels. As against most of the prior work on voltage islands that mainly focused on the architecture design and IP placement related issues, this paper studies the necessary software compiler support for voltage islands. Specifically, we focus on an embedded multiprocessor architecture that supports both voltage islands and control domains within these islands, and determine how an optimizing compiler can automatically map an embedded application onto this architecture. Such an automated support is critical since it is unrealistic to expect an application programmer to reach a good mapping correlating multiple factors such as performance and energy at the same time. Our experiments with the proposed compiler support show that our approach is very effective in reducing energy consumption. The experiments also show that the energy savings we achieve are consistent across a wide range of values of our major simulation parameters. © 1968-2012 IEEE.

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Keywords
Compiler optimizations, Compiler-based parallelization, Energy consumption, Voltage islands, Voltage scaling, Application programmers, Architecture designs, Automated support, Control domains, Dynamic voltage scaling, Embedded application, Embedded multiprocessor architectures, Energy reduction, Multiple factors, Optimizing compilers, Parallelizations, Reducing energy consumption, Simulation parameters, System design flows, Energy utilization, Experiments, Optimization, Turnaround time, Program compilers
Citation
Published Version (Please cite this version)