Integration of chips by flip-chip bonding techniques

Abstract

Integration and packaging of MEMS devices are necessary for designing operational, independent and mobile products. Flip-chip bonding (FCB) has been recognized as an important technology to meet some of the integration and pack-aging needs. To assemble a probe for photoacoustic imaging (PAI), integration of ASIC chips with a CMUT chip and integration of the CMUT chip with a PCB is required, where various FCB techniques may be employed for integration. Thermo-sonic FCB was the most suitable for the ASIC-CMUT integration. Gold stud bumps (GSBs) were used for the TSFCB. Therefore, the fabrication of GSBs was optimized for 25.4 µm and 17.5 µm diameter gold wires. Also, to flatten the top surface of the GSBs and to level the height of the GSBs, a novel displacement-controlled coining (DCC) process is developed. The height and bonding surface area of the GSBs can be tailored for flip-chip bonding (FCB) processes. Furthermore, using the lumped-capacitance modeling approach, a heat energy transfer based, experimentally validated analytical model is developed for the thermo-sonic flip-chip bonding process (TSFCB). The developed analytical model is used to estimate TSFCB process parameters for ASIC-CMUT FCB integration. Successful TSFCB process trials are completed in this study at a wide range of process temperatures (Tprocess) of 24 °C, 25 °C, 40 °C, 150 °C, and 375 °C. Two ASIC chips are successfully integrated with a CMUT chip via the TSFCB. Another FCB process combines stacked GSBs and isotropic conductive adhesive (ICA) material optimized for the integration of CMUT-PCB. Surface-mount device (SMD) and a through-hole component of the PCB are soldered and fabrication of the integrated electronic systems of the probe is completed. Finally, the design and fabrication of the probe are presented. The probe is assembled using integrated electronic systems for PAI imaging.