Adaptive compute-phase prediction and thread prioritization to mitigate memory access latency

dc.citation.epage4en_US
dc.citation.spage1en_US
dc.contributor.authorAktürk, İsmailen_US
dc.contributor.authorÖztürk, Özcanen_US
dc.coverage.spatialMinneapolis, MN, USA
dc.date.accessioned2016-02-08T11:45:58Z
dc.date.available2016-02-08T11:45:58Z
dc.date.issued2014-06en_US
dc.departmentDepartment of Computer Engineeringen_US
dc.descriptionDate of Conference: 15-15 June, 2014
dc.descriptionConference name: MES '14 Proceedings of International Workshop on Manycore Embedded Systems
dc.description.abstractThe full potential of chip multiprocessors remains unex- ploited due to the thread oblivious memory access sched- ulers used in off-chip main memory controllers. This is especially pronounced in embedded systems due to limita- Tions in memory. We propose an adaptive compute-phase prediction and thread prioritization algorithm for memory access scheduling for embedded chip multiprocessors. The proposed algorithm eficiently categorize threads based on execution characteristics and provides fine-grained priori- Tization that allows to differentiate threads and prioritize their memory access requests accordingly. The threads in compute phase are prioritized among the threads in mem- ory phase. Furthermore, the threads in compute phase are prioritized among themselves based on the potential of mak- ing more progress in their execution. Compared to the prior works First-Ready First-Come First-Serve (FR-FCFS) and Compute-phase Prediction with Writeback-Refresh Overlap (CP-WO), the proposed algorithm reduces the execution time of the generated workloads up to 23.6% and 12.9%, respectively. Copyright 2014 ACM.en_US
dc.identifier.doi10.1145/2613908.2613919en_US
dc.identifier.urihttp://hdl.handle.net/11693/27152
dc.language.isoEnglishen_US
dc.publisherACMen_US
dc.relation.isversionofhttp://dx.doi.org/10.1145/2613908.2613919en_US
dc.source.titleACM International Conference Proceeding Seriesen_US
dc.subjectComputer architectureen_US
dc.subjectEmbedded systemsen_US
dc.subjectSchedulingen_US
dc.subjectChip multiprocessoren_US
dc.subjectEmbedded chipsen_US
dc.subjectMain memoryen_US
dc.subjectMemory accessen_US
dc.subjectMemory access latencyen_US
dc.subjectMemory access schedulingen_US
dc.subjectOff-chipen_US
dc.subjectPrioritizationen_US
dc.subjectForecastingen_US
dc.titleAdaptive compute-phase prediction and thread prioritization to mitigate memory access latencyen_US
dc.typeConference Paperen_US
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