PID controller design for first order unstable time delay systems
buir.advisor | Özbay, Hitay | |
dc.contributor.author | Arslan, Gül Ezgi | |
dc.date.accessioned | 2016-01-08T18:14:23Z | |
dc.date.available | 2016-01-08T18:14:23Z | |
dc.date.issued | 2009 | |
dc.description | Ankara : The Department of Electrical and Electronics Engineering and the Institute of Engineering and Sciences of Bilkent University, 2009. | en_US |
dc.description | Thesis (Master's) -- -Bilkent University, 2009. | en_US |
dc.description | Includes bibliographical references leaves 103-106 | en_US |
dc.description.abstract | In this thesis, problem of designing P, PI and PD-like controllers for switched first order unstable systems with time delay is studied. For each type of controller, the problem is solved in two steps. First, the set of stabilizing controllers for the class of plants considered is determined using different approaches. Then, an appropriate controller inside this set is chosen such that the feedback systems satisfies a desired property, which is for example gain and phase margin maximization or the dwell time minimization. In the first part, we focus on PI controllers and tune the PI controller parameters in order to maximize the gain and phase margins. The observations in this part show that a P controller is adequate to maximize gain and phase margins. Then, we move on to the problem of tuning P, PI and PD-like (first order stable) controller parameters such that the switched feedback system is stabilized and the dwell time (minimum required time between consequent switchings to ensure stability) is minimized. For this purpose, a dwell-time based stability condition of [39] is used for the class of switched time delay systems. We show that a proportional controller can be found with this method, but a PI controller is not feasible. Finally, we focus on the design of PD-like controllers for switched first order unstable systems with time delays. The proposed method finds the values of PD-like (first order stable) controller parameters which minimize an upper bound of the dwell time. The conservatism analysis of this method is done by time domain simulations. The results show that the calculated upper bound for the dwell time is close to the lower bound of the dwell time observed by simulations. In addition, we compare the obtained PD-like controller results with some alternative PD and first order controller design techniques proposed in the literature. | en_US |
dc.description.provenance | Made available in DSpace on 2016-01-08T18:14:23Z (GMT). No. of bitstreams: 1 0005013.pdf: 569272 bytes, checksum: 9214780af670ee8db66e99f4119d3a02 (MD5) | en |
dc.description.statementofresponsibility | Arslan, Gül Ezgi | en_US |
dc.format.extent | xi, 106 leaves, illustrations, graphs | en_US |
dc.identifier.uri | http://hdl.handle.net/11693/15160 | |
dc.language.iso | English | en_US |
dc.rights | info:eu-repo/semantics/openAccess | en_US |
dc.subject | Stability Analysis | en_US |
dc.subject | Switched Systems | en_US |
dc.subject | Time Delay | en_US |
dc.subject | PID Control | en_US |
dc.subject | Dwell Time | en_US |
dc.subject | Gain Margin | en_US |
dc.subject | Phase Margin | en_US |
dc.subject.lcc | TJ223.P55 A674 2009 | en_US |
dc.subject.lcsh | PID controllers. | en_US |
dc.subject.lcsh | Control theory. | en_US |
dc.subject.lcsh | Time delay systems. | en_US |
dc.title | PID controller design for first order unstable time delay systems | en_US |
dc.type | Thesis | en_US |
thesis.degree.discipline | Electrical and Electronic Engineering | |
thesis.degree.grantor | Bilkent University | |
thesis.degree.level | Master's | |
thesis.degree.name | MS (Master of Science) |
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