Adaptive routing framework for network on chip architectures
dc.citation.epage | 5 | en_US |
dc.citation.spage | 1 | en_US |
dc.contributor.author | Mustafa, Naveed Ul | en_US |
dc.contributor.author | Öztürk, Özcan | en_US |
dc.contributor.author | Niar, S. | en_US |
dc.coverage.spatial | Prague, Czech Republic | |
dc.date.accessioned | 2018-04-12T11:44:42Z | |
dc.date.available | 2018-04-12T11:44:42Z | |
dc.date.issued | 2016-01 | en_US |
dc.department | Department of Computer Engineering | en_US |
dc.description | Date of Conference: 18 January, 2016 | |
dc.description | Conference name: RAPIDO '16 Proceedings of the 8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools | |
dc.description.abstract | In this paper we suggest and demonstrate the idea of applying multiple routing algorithms during the execution of a real application mapped on a Network-on-Chip (NoC). Traffic pattern of a real application may change during its execution. As performance of an algorithm depends on the traffic pattern, using the same routing algorithm for the entire span of execution may be inefficient. We study the feasibility of this idea for applications such as SPARSE and MPEG-4 decoder, by applying different routing algorithms. By applying more than one routing algorithms, throughput improves up to 17.37% and 6.74% in the case of SPARSE and MPEG-4 decoder applications, respectively, as compared to the application of single routing algorithm. © 2016 ACM. | en_US |
dc.description.provenance | Made available in DSpace on 2018-04-12T11:44:42Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 179475 bytes, checksum: ea0bedeb05ac9ccfb983c327e155f0c2 (MD5) Previous issue date: 2016 | en |
dc.identifier.doi | 10.1145/2852339.2852344 | en_US |
dc.identifier.uri | http://hdl.handle.net/11693/37586 | en_US |
dc.language.iso | English | en_US |
dc.publisher | ACM | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1145/2852339.2852344 | en_US |
dc.source.title | RAPIDO '16 Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools | en_US |
dc.subject | Network-on-chip | en_US |
dc.subject | Routing algorithms | en_US |
dc.subject | Throughput | en_US |
dc.subject | Algorithms | en_US |
dc.subject | Computer architecture | en_US |
dc.subject | Decoding | en_US |
dc.subject | Motion Picture Experts Group standards | en_US |
dc.subject | Network routing | en_US |
dc.subject | Routing algorithms | en_US |
dc.subject | Servers | en_US |
dc.subject | Throughput | en_US |
dc.subject | VLSI circuits | en_US |
dc.subject | Adaptive routing | en_US |
dc.subject | MPEG-4 decoders | en_US |
dc.subject | Network-on-chip architectures | en_US |
dc.subject | Network-on-chip(NoC) | en_US |
dc.subject | Real applications | en_US |
dc.subject | Traffic pattern | en_US |
dc.title | Adaptive routing framework for network on chip architectures | en_US |
dc.type | Conference Paper | en_US |
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