PID controller synthesis for a class of unstable MIMO plants with I/O delays
buir.contributor.author | Özbay, Hitay | |
dc.citation.epage | 142 | en_US |
dc.citation.issueNumber | 1 | en_US |
dc.citation.spage | 135 | en_US |
dc.citation.volumeNumber | 43 | en_US |
dc.contributor.author | Gündeş, A. N. | en_US |
dc.contributor.author | Özbay, Hitay | en_US |
dc.contributor.author | Özgüler, A. B. | en_US |
dc.date.accessioned | 2015-07-28T11:57:58Z | |
dc.date.available | 2015-07-28T11:57:58Z | |
dc.date.issued | 2007-01 | en_US |
dc.department | Department of Electrical and Electronics Engineering | en_US |
dc.description.abstract | Conditions are presented for closed-loop stabilizability of linear time-invariant (LTI) multi-input, multi-output (MIMO) plants with I/O delays (time delays in the input and/or output channels) using PID (Proportional + Integral + Derivative) controllers. We show that systems with at most two unstable poles can be stabilized by PID controllers provided a small gain condition is satisfied. For systems with only one unstable pole, this condition is equivalent to having sufficiently small delay-unstable pole product. Our method of synthesis of such controllers identify some free parameters that can be used to satisfy further design criteria than stability. | en_US |
dc.description.provenance | Made available in DSpace on 2015-07-28T11:57:58Z (GMT). No. of bitstreams: 1 10.1016-j.automatica.2006.08.009.pdf: 360191 bytes, checksum: 44e1780e795100bd0bd8f7cf42c0ea68 (MD5) | en |
dc.identifier.doi | 10.1016/j.automatica.2006.08.009 | en_US |
dc.identifier.eissn | 1873-2836 | |
dc.identifier.issn | 0005-1098 | |
dc.identifier.uri | http://hdl.handle.net/11693/11517 | |
dc.language.iso | English | en_US |
dc.publisher | Elsevier BV | en_US |
dc.relation.isversionof | https://doi.org/10.1016/j.automatica.2006.08.009 | en_US |
dc.source.title | Automatica | en_US |
dc.subject | PID control | en_US |
dc.subject | Time delay | en_US |
dc.subject | Unstable systems | en_US |
dc.subject | Multi-input multi-output systems | en_US |
dc.title | PID controller synthesis for a class of unstable MIMO plants with I/O delays | en_US |
dc.type | Article | en_US |
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