PID controller synthesis for a class of unstable MIMO plants with I/O delays

buir.contributor.authorÖzbay, Hitay
dc.citation.epage142en_US
dc.citation.issueNumber1en_US
dc.citation.spage135en_US
dc.citation.volumeNumber43en_US
dc.contributor.authorGündeş, A. N.en_US
dc.contributor.authorÖzbay, Hitayen_US
dc.contributor.authorÖzgüler, A. B.en_US
dc.date.accessioned2015-07-28T11:57:58Z
dc.date.available2015-07-28T11:57:58Z
dc.date.issued2007-01en_US
dc.departmentDepartment of Electrical and Electronics Engineeringen_US
dc.description.abstractConditions are presented for closed-loop stabilizability of linear time-invariant (LTI) multi-input, multi-output (MIMO) plants with I/O delays (time delays in the input and/or output channels) using PID (Proportional + Integral + Derivative) controllers. We show that systems with at most two unstable poles can be stabilized by PID controllers provided a small gain condition is satisfied. For systems with only one unstable pole, this condition is equivalent to having sufficiently small delay-unstable pole product. Our method of synthesis of such controllers identify some free parameters that can be used to satisfy further design criteria than stability.en_US
dc.description.provenanceMade available in DSpace on 2015-07-28T11:57:58Z (GMT). No. of bitstreams: 1 10.1016-j.automatica.2006.08.009.pdf: 360191 bytes, checksum: 44e1780e795100bd0bd8f7cf42c0ea68 (MD5)en
dc.identifier.doi10.1016/j.automatica.2006.08.009en_US
dc.identifier.eissn1873-2836
dc.identifier.issn0005-1098
dc.identifier.urihttp://hdl.handle.net/11693/11517
dc.language.isoEnglishen_US
dc.publisherElsevier BVen_US
dc.relation.isversionofhttps://doi.org/10.1016/j.automatica.2006.08.009en_US
dc.source.titleAutomaticaen_US
dc.subjectPID controlen_US
dc.subjectTime delayen_US
dc.subjectUnstable systemsen_US
dc.subjectMulti-input multi-output systemsen_US
dc.titlePID controller synthesis for a class of unstable MIMO plants with I/O delaysen_US
dc.typeArticleen_US

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