An ILP formulation for application mapping onto Network-on-Chips

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dc.contributor.authorTosun, S.en_US
dc.contributor.authorÖztürk, Özcanen_US
dc.contributor.authorOzen, M.en_US
dc.coverage.spatialBaku, Azerbaijanen_US
dc.date.accessioned2016-02-08T12:26:30Z
dc.date.available2016-02-08T12:26:30Z
dc.date.issued2009en_US
dc.departmentDepartment of Computer Engineeringen_US
dc.descriptionDate of Conference: 14-16 Oct. 2009en_US
dc.description.abstractEver shrinking technologies in VLSI era made it possible to place several modules onto a single die. However, the need for the new communication methods has also increased dramatically since traditional bus-based systems suffer from signal propagation delays, signal integrity, and scalability. Network-on-Chip (NoC) is the biggest step towards the communication bottleneck of System-on-Chip (SoC) architectures. In this paper, we present an Integer Linear Programming (ILP) formulation for application mapping onto mesh based Network-on-Chips to minimize the energy consumption of the system. The proposed method obtains optimal or close to optimal results within the given computation time limit. We also experimentally investigate the impact of the size of the mesh architecture on the application mapping and total communication. ©2009 IEEE.en_US
dc.description.provenanceMade available in DSpace on 2016-02-08T12:26:30Z (GMT). No. of bitstreams: 1 bilkent-research-paper.pdf: 70227 bytes, checksum: 26e812c6f5156f83f0e77b261a471b5a (MD5) Previous issue date: 2009en
dc.identifier.doi10.1109/ICAICT.2009.5372524en_US
dc.identifier.urihttp://hdl.handle.net/11693/28661
dc.language.isoEnglishen_US
dc.publisherIEEEen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/ICAICT.2009.5372524en_US
dc.source.title2009 International Conference on Application of Information and Communication Technologiesen_US
dc.subjectApplication mappingen_US
dc.subjectBus-baseden_US
dc.subjectCommunication methoden_US
dc.subjectComputation timeen_US
dc.subjectEnergy consumptionen_US
dc.subjectILP formulationen_US
dc.subjectInteger Linear Programmingen_US
dc.subjectMesh architectureen_US
dc.subjectNetwork on chipen_US
dc.subjectNetwork-on-chipsen_US
dc.subjectOptimal resultsen_US
dc.subjectSignal Integrityen_US
dc.subjectSignal propagation delaysen_US
dc.subjectSystem-on-chip architectureen_US
dc.subjectApplication specific integrated circuitsen_US
dc.subjectInteger programmingen_US
dc.subjectLinearizationen_US
dc.subjectMappingen_US
dc.subjectMicroprocessor chipsen_US
dc.subjectOptimizationen_US
dc.subjectProgrammable logic controllersen_US
dc.subjectRoutersen_US
dc.subjectVLSI circuitsen_US
dc.subjectCommunicationen_US
dc.titleAn ILP formulation for application mapping onto Network-on-Chipsen_US
dc.typeConference Paperen_US

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