A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High-Speed and Mixed-Signal VLSIC

Abstract

A wired-AND current-mode logic (WCML) circuit technique in CMOS technology for low-voltage and high-speed VLSI circuits is proposed, and a WCML cell library is developed using standard 0.8 micron CMOS process. The proposed WCML technique applies the analog circuit design methodologies to the digital circuit design. The input and output logic signals are represented by current quantities. The supply current of the logic circuit is adjustable for the required logic speed and the switching noise level. The noise is reduced on the power supply lines and in the substrate by the current-steering technique and by the smooth swing of the reduced node potentials. Precise analog circuits and fast digital circuits can be integrated on the same silicon substrate by using the low noise property of the WCML. It is shown by the simulations that at low supply voltages, the WCML is faster and generates less switching noise when compared to the static-CMOS logic. At high speeds, the power dissipation of the WCML is less than that of the static-CMOS logic.