A three-stage reactively-matched 6-18 GHz power amplifier MMIC design is presented. The design effort is focused on obtaining a low-loss output matching network for a high output power density. Active unit cells consist of an 8×125 μm transistor stabilized with a symmetrical parallel RC circuit. The wideband amplifier is fabricated using our in-house 0.25 μm GaN on SiC HEMT process. The fabrication technology details and overall device performance are reported. Experimental results show that the MMIC has a minimum gain of 22 dB and a maximum gain of 26.5 dB across the operation band. An average output power density higher than 3.3W/mm with an associated average power-added efficiency of 22.5% is achieved. The MMIC demonstrates output power greater than 9.5 W at the center frequency. This design is distinguished from recent studies with its low-ripple high gain and high output power density.