Exploiting an alternative labeling for efficient hypercube algorithms
In this work, a new labeling scheme for hypercube multicomputers is proposed. The proposed labeling is exploited by developing algorithms on the SIMD hypercube model with the indirect I/O port register enhancement. Through the construction of some algorithms and reduction in their SIMD complexities, it is shown that this new labeling is superior to the common labeling used so far. In the common labeling, processor index computations required for nearest neighbor communications in ring and mesh embeddings can be performed in O(d)time in a d-dimensional hypercube. These routing computations can be performed in O(1) time only if a number of gray code conversion tables are used. In the proposed labeling, these routing computations can be performed in O(1) time, using simple decimal arithmetic and without the need of any code conversion tables, which provides a flexible parallel programming environment. Instead of gray code ordering in the common labeling the natural decimal ordering of the processors in the proposed labeling suffices for the embedded ring and mesh operations. In most of the SIMD algorithms developed, best previous MIMD complexities are reached. Finally, the generalization of the proposed labelingfor the generalized hypercube architecture is presented which provides algorithmic compatibility in embedded ring operations.