Browsing by Subject "Static and dynamic"

Now showing 1 - 3 of 3

Open Access
Cost-aware strategies for query result caching in Web search engines
(Association for Computing Machinery, 2011) Ozcan, R.; Altingovde, I. S.; Ulusoy, O.
Search engines and large-scale IR systems need to cache query results for efficiency and scalability purposes. Static and dynamic caching techniques (as well as their combinations) are employed to effectively cache query results. In this study, we propose cost-aware strategies for static and dynamic caching setups. Our research is motivated by two key observations: (i) query processing costs may significantly vary among different queries, and (ii) the processing cost of a query is not proportional to its popularity (i.e., frequency in the previous logs). The first observation implies that cache misses have different, that is, nonuniform, costs in this context. The latter observation implies that typical caching policies, solely based on query popularity, can not always minimize the total cost. Therefore, we propose to explicitly incorporate the query costs into the caching policies. Simulation results using two large Web crawl datasets and a real query log reveal that the proposed approach improves overall system performance in terms of the average query execution time. © 2011 ACM.
Open Access
An equivalent circuit for collapse operation mode of CMUTs
(IEEE, 2010) Olcum, Selim; Yamaner F.Y.; Bozkurt, A.; Köymen, Hayrettin; Atalar, Abdullah
Collapse mode of operation of the capacitive mi-cromachined ultrasonic transducers (CMUTs) was shown to be a very effective way for achieving high output pressures. However, no accurate model exists for understanding the mechanics and limits of the collapse mode. In this work, we extend the analyses made for CMUTs working in uncollapsed mode to collapsed mode. We have developed an equivalent nonlinear electrical circuit that can accurately simulate the mechanical behavior of a CMUT under any large signal electrical excitation. The static and dynamic deflections of a membrane predicted by the model are compared with the finite element simulations. The equivalent circuit model can estimate the static deflection within 1% and the transient behavior of a CMUT membrane within 3% accuracy. The circuit model is also compared to experimental results of pulse excitation applied to fabricated collapse mode CMUTs. The model is suitable as a powerful design and optimization tool for the collapsed as well as the uncollapsed case of CMUTs. © 2010 IEEE.
Open Access
Using data compression for increasing memory system utilization
(Institute of Electrical and Electronics Engineers, 2009-06) Ozturk, O.; Kandemir, M.; Irwin, M. J.
The memory system presents one of the critical challenges in embedded system design and optimization. This is mainly due to the ever-increasing code complexity of embedded applications and the exponential increase seen in the amount of data they manipulate. The memory bottleneck is even more important for multiprocessor-system-on-a-chip (MPSoC) architectures due to the high cost of off-chip memory accesses in terms of both energy and performance. As a result, reducing the memory-space occupancy of embedded applications is very important and will be even more important in the next decade. While it is true that the on-chip memory capacity of embedded systems is continuously increasing, the increases in the complexity of embedded applications and the sizes of the data sets they process are far greater. Motivated by this observation, this paper presents and evaluates a compiler-driven approach to data compression for reducing memory-space occupancy. Our goal is to study how automated compiler support can help in deciding the set of data elements to compress/ decompress and the points during execution at which these compressions/decompressions should be performed. We first study this problem in the context of single-core systems and then extend it to MPSoCs where we schedule compressions and decompressions intelligently such that they do not conflict with application execution as much as possible. Particularly, in MPSoCs, one needs to decide which processors should participate in the compression and decompression activities at any given point during the course of execution. We propose both static and dynamic algorithms for this purpose. In the static scheme, the processors are divided into two groups: those performing compression/ decompression and those executing the application, and this grouping is maintained throughout the execution of the application. In the dynamic scheme, on the other hand, the execution starts with some grouping but this grouping can change during the course of execution, depending on the dynamic variations in the data access pattern. Our experimental results show that, in a single-core system, the proposed approach reduces maximum memory occupancy by 47.9% and average memory occupancy by 48.3% when averaged over all the benchmarks. Our results also indicate that, in an MPSoC, the average energy saving is 12.7% when all eight benchmarks are considered. While compressions and decompressions and related bookkeeping activities take extra cycles and memory space and consume additional energy, we found that the improvements they bring from the memory space, execution cycles, and energy perspectives are much higher than these overheads. © 2009 IEEE.