Browsing by Subject "Pipeline processing systems"
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Item Open Access Efficient vectorization of forward/backward substitutions in solving sparse linear equations(IEEE, 1994) Aykanat, Cevdet; Özgü, Özlem; Güven, N.Vector processors have promised an enormous increase in computing speed for computationally intensive and time-critical power system problems which require the repeated solution of sparse linear equations. Due to short vectors processed in these applications, standard sparsity-based algorithms need to be restructured for efficient vectorization. This paper presents a novel data storage scheme and an efficient vectorization algorithm that exploits the intrinsic architectural features of vector computers such as sectioning and chaining. As the benchmark, the solution phase of the Fast Decoupled Load Flow algorithm is used in simulations. The relative performances of the proposed and existing vectorization schemes are evaluated, both theoretically and experimentally, on IBM 3090/VF.Item Open Access JPEG hardware accelerator design for FPGA(IEEE, 2007) Duman, Kaan; Çoǧun, Fuat; Öktem, L.A fully pipelined JPEG hardware accelerator that runs on FPGA is presented. The accelerator is designed interactively in a simulation environment, using a DSP hardware design automation tool chain. The encoder part of the accelerator accepts 8×8 image blocks in a streaming fashion, and outputs the zigzag-scanned, quantized 2-D DCT coefficients of the block. The decoder part accepts zigzag-scanned, quantized DCT coefficients, and outputs reconstructed 8×8 image block. Each part has a throughput of one system clock per pixel per channel. The encoder employs a fast pipelined implementation for 2-D DCT [1]. For the decoder, a new pipelined 2-D IDCT structure is developed. Our IDCT structure is based on an IDCT factorization for software implementation [2], and is inspired by the pipelined DCT structure employed in the encoder. The resource utilization and maximum frequency figures for a particular FPGA target suggest that our accelerator has competitive performance.