Browsing by Subject "Experimental evidence"

Now showing 1 - 4 of 4

Open Access
Broadband optical transparency in plasmonic nanocomposite polymer films via exciton-plasmon energy transfer
(OSA - The Optical Society, 2016) Dhama R.; Rashed, A. R.; Caligiuri V.; El Kabbash M.; Strangi, G.; De Luca A.
Inherent absorptive losses affect the performance of all plasmonic devices, limiting their fascinating applications in the visible range. Here, we report on the enhanced optical transparency obtained as a result of the broadband mitigation of optical losses in nanocomposite polymeric films, embedding core-shell quantum dots (CdSe@ZnS QDs) and gold nanoparticles (Au-NPs). Exciton-plasmon coupling enables non-radiative energy transfer processes from QDs to metal NPs, resulting in gain induced transparency of the hybrid flexible systems. Experimental evidences, such as fluorescence quenching and modifications of fluorescence lifetimes confirm the presence of this strong coupling between plexcitonic elements. Measures performed by means of an ultra-fast broadband pump-probe setup demonstrate loss compensation of gold NPs dispersed in plastic network in presence of gain. Furthermore, we compare two films containing different concentrations of gold NPs and same amount of QDs, to investigate the role of acceptor concentration (Au-NPs) in order to promote an effective and efficient energy transfer mechanism. Gain induced transparency in bulk systems represents a promising path towards the realization of loss compensated plasmonic devices. © 2016 Optical Society of America.
Open Access
Nonadditivity of critical Casimir forces
(OSA, 2017) Callegari, Agnese; Paladugu, Sathyanarayana; Tuna, Yazgan; Barth, Lukas; Dietrich, S.; Gambassi, A.; Volpe, Giovanni
We provide the first experimental evidence of nonadditivity for critical Casimir forces: the force that two colloidal particles exert together on a third one differs from the sum of the forces they exert separately.
Open Access
Process variation aware thread mapping for chip multiprocessors
(IEEE, 2009-04) Hong, S.; Narayanan, S. H. K.; Kandemir, M.; Özturk, Özcan
With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiprocessors (CMPs) for example, it is possible that identically-designed processor cores on the chip have non-identical peak frequencies and power consumptions. To cope with such a design, each processor can be assumed to run at the frequency of the slowest processor, resulting in wasted computational capability. This paper considers an alternate approach and proposes an algorithm that intelligently maps (and remaps) computations onto available processors so that each processor runs at its peak frequency. In other words, by dynamically changing the thread-to-processor mapping at runtime, our approach allows each processor to maximize its performance, rather than simply using chip-wide lowest frequency amongst all cores and highest cache latency. Experimental evidence shows that, as compared to a process variation agnostic thread mapping strategy, our proposed scheme achieves as much as 29% improvement in overall execution latency, average improvement being 13% over the benchmarks tested. We also demonstrate in this paper that our savings are consistent across different processor counts, latency maps, and latency distributions.With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiprocessors (CMPs) for example, it is possible that identically-designed processor cores on the chip have non-identical peak frequencies and power consumptions. To cope with such a design, each processor can be assumed to run at the frequency of the slowest processor, resulting in wasted computational capability. This paper considers an alternate approach and proposes an algorithm that intelligently maps (and remaps) computations onto available processors so that each processor runs at its peak frequency. In other words, by dynamically changing the thread-to-processor mapping at runtime, our approach allows each processor to maximize its performance, rather than simply using chip-wide lowest frequency amongst all cores and highest cache latency. Experimental evidence shows that, as compared to a process variation agnostic thread mapping strategy, our proposed scheme achieves as much as 29% improvement in overall execution latency, average improvement being 13% over the benchmarks tested. We also demonstrate in this paper that our savings are consistent across different processor counts, latency maps, and latency distributions. © 2009 EDAA.
Open Access
Searching for complex human activities with no visual examples
(2008) Ikizler, N.; Forsyth, D.A.
We describe a method of representing human activities that allows a collection of motions to be queried without examples, using a simple and effective query language. Our approach is based on units of activity at segments of the body, that can be composed across space and across the body to produce complex queries. The presence of search units is inferred automatically by tracking the body, lifting the tracks to 3D and comparing to models trained using motion capture data. Our models of short time scale limb behaviour are built using labelled motion capture set. We show results for a large range of queries applied to a collection of complex motion and activity. We compare with discriminative methods applied to tracker data; our method offers significantly improved performance. We show experimental evidence that our method is robust to view direction and is unaffected by some important changes of clothing. © 2008 Springer Science+Business Media, LLC.