Browsing by Subject "Data"
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Item Open Access Dynamic thread and data mapping for NoC based CMPs(IEEE, 2009-07) Kandemir, M.; Öztürk, Özcan; Muralidhara, S. P.Thread mapping and data mapping are two important problems in the context of NoC (network-on-chip) based CMPs (chip multiprocessors). While a compiler can determine suitable mappings for data and threads, such static mappings may not work well for multithreaded applications that go through different execution phases during their execution, each phase with potentially different data access patterns than others. Instead, a dynamic mapping strategy, if its overheads can be kept low, may be a more promising option. In this work, we present dynamic (runtime) thread and data mappings for NoC based CMPs. The goal of these mappings is to reduce the distance between the location of the core that requests data and the core whose local memory contains that requested data. In our experiments, we evaluate our proposed thread mapping and data mapping in isolation as well as in an integrated manner. Copyright 2009 ACM.Item Open Access A plea for greater attention on the data in policy analysis(Elsevier Inc., 1999) Mercenier, J.; Yeldan, E.The technical difficulties associated with building and solving applied general equilibrium (GE) models seem to have distracted our attention from the data. In this article, we forcefully stress that whatever the sophistication of the GE analysis, it is only worth the quality of the supporting data it utilizes. We first highlight an example of a flagrant flaw in officially published input-output data (factor-income shares) by an LDC (Turkey), which many researchers use without question. We then make use of an applied GE model to evaluate the dynamic gains for Turkey from currently debated trade policy options and compare the predictions using conservatively adjusted, rather than official, data on factor shares. We show that the predicted welfare gains are not only of a different order of magnitude, but in some cases, of a different sign; hence, suggesting contradictory policy recommendations.Item Open Access Reducing coherency traffic volume in chip multiprocessors through pointer analysis(Bilkent University, 2017-09) Derebaşoğlu, ErdemWith increasing number of cores in chip multiprocessors (CMPs), it gets more challenging to provide cache coherency efficiently. Although snooping based protocols are appropriate solutions to small scale systems, they are inefficient for large systems because of the limited bandwidth. Therefore, large scale CMPs require directory based solutions where a hardware structure called directory holds the information. This directory keeps track of all memory blocks and which core's cache stores a copy of these blocks. The directory sends messages only to caches that store relevant blocks and also coordinates simultaneous accesses to a cache block. As directory based protocols scaled to many cores, performance, network-on-chip (NoC) traffic, and bandwidth become major problems. In this thesis, we present software mechanisms to improve effectiveness of directory based cache coherency on CMPs with shared memory. In multithreaded applications, some of the data accesses do not disrupt cache coherency, but they still produce coherency messages among cores. For example, read-only (private) data can be considered in this category. On the other hand, if data is accessed by at least two cores and at least one of them is a write operation, it is called shared data. In our proposed system, private data and shared data are determined at compile time, and cache coherency protocol only applies to shared data. We implement our approach in two stages. First, we use Andersen's pointer analysis to analyze a program and mark its private instructions, i.e instructions that load or store private data, at compile time. Second, we run the program in Sniper Multi-Core Simulator [1] with the proposed hardware con guration. We used SPLASH-2 and PARSEC-2.1 parallel benchmarks to test our approach. Simulation results show that our approach reduces cycle count, dynamic random access memory (DRAM) accesses, and coherency traffic.