Browsing by Subject "Adders"
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Item Open Access A novel heterogeneous approximate multiplier for low power and high performance(Institute of Electrical and Electronics Engineers, 2018) Alouani, I.; Ahangari, Hamzeh; Öztürk, Özcan; Niar, S.Approximate computing is a design paradigm considered for a range of applications that can tolerate some loss of accuracy. In fact, the bottleneck in conventional digital design techniques can be eliminated to achieve higher performance and energy efficiency by compromising accuracy. In this letter, a new architecture that engages accuracy as a design parameter is presented, where an approximate parallel multiplier using heterogeneous blocks is implemented. Based on design space exploration, we demonstrate that introducing diverse building blocks to implement the multiplier rather than cloning one building block achieves higher precision results. We show experimental results in terms of precision, delay, and power dissipation as metrics and compare with three previous approximate designs. Our results show that the proposed heterogeneous multiplier achieves more precise outputs than the tested circuits while improving performance and power tradeoffs.Item Open Access A VLSI receive beamformer for digital ultrasound imaging(IEEE, 1992-03) Karaman, Mustafa; Kolağasıoğlu, Ertuğrul; Atalar, AbdullahA VLSI architecture for real-time digital receive beamforming in phased array ultrasound imaging is proposed. The architecture is an inverse binary tree like structure with N stages where N is the number of array elements. The sampled signals from the phased array channels are coherently added in a pairwise manner within the stages of the architecture in a pipelined data flow scheme. The storage requirement for the synchronization of the asynchronously received samples corresponding to a focal point is significantly reduced. The architecture is modular and has a regular communication scheme which make the VLSI implementation rather easy and straightforward.