Browsing by Subject "ALD"

Now showing 1 - 7 of 7

Open Access
Electrospinning combined with atomic layer deposition to generate applied nanomaterials: A review
(American Chemical Society, 2020) Vempati, S.; Ranjith, K. S.; Topuz, Fuat; Bıyıklı, Necmi; Uyar, Tamer
Combining different material processing techniques is one of the keys to obtain materials that depict synergistic properties. In this review, we have reviewed a combination of two highly potential techniques, namely, electrospinning and atomic layer deposition (ALD), in the view of various applications. Over the past 10 years, our research groups are involved in the exploration of employing this combination for a range of applications. We also include some basic information on both the processes and diversity of nanostructures as a result of their combination. Nonwoven nanofiber membranes are excellent candidates for a wide range of applications. Also, they can act as templates to produce various other kinds of nanostructures when combined with ALD in small/large scale production. These nanostructures could be used as such or further subjected to other processing techniques yielding hierarchical structures. In this review, we exclusively survey and highlight the unique capabilities of combined electrospinning and ALD for applications in catalysis, photocatalysis, solar cells, batteries and gas sensors.
Open Access
Gibbs free energy assisted passivation layers
(SPIE, 2016) Salihoğlu, Ömer; Tansel, T.; Hoştut, M.; Ergun, Y.; Aydınlı, Atilla
Reduction of surface leakage is a major challenge in most photodetectors that requires the elimination of surface oxides on etched mesas during passivation. Engineering the passivation requires close attention to chemical reactions that take place at the interface during the process. In particular, removal of surface oxides may be controlled via Gibbs reactivity. We have compared electrical performance of type-II superlattice photodetectors, designed for MWIR operation, passivated by different passivation techniques. We have used ALD deposited Al2O3, HfO2, TiO2, ZnO, PECVD deposited SiO2, Si3N4 and sulphur containing octadecanethiol (ODT) selfassembled monolayers (SAM) passivation layers on InAs/GaSb p-i-n superlattice photodetectors with cutoff wavelength at 5.1 μm. In this work, we have compared the result of different passivation techniques which are done under same conditions, same epitaxial structure and same fabrication processes. We have found that ALD deposited passivation is directly related to the Gibbs free energy of the passivation material. Gibbs free energies of the passivation layer can directly be compared with native surface oxides to check the effectiveness of the passivation layer before the experimental study.
Open Access
High performance floating gate memories using graphene as charge storage medium and atomic layer deposited high-k dielectric layers as tunnel barrier
(2013) Kocaay, Deniz
With the ongoing development in portable electronic devices, low power consumption, improved data retention rate and higher operation speed are the merits demanded by modern non-volatile memory technology. Flash memory devices with discrete charge-trapping media are regarded as an alternative solution to conventional floating gate technology. Flash memories utilizing Sinitride as charge storage media dominate due to enhanced endurance, better scaling capability and simple fabrication. The use of high-k dielectrics as tunnel layer and control layer is also crucial in charge-trap flash memory devices since they allow further scaling and enhanced charge injection without data retention degradation. Atomic layer deposition (ALD) is a powerful technique for the growth of pinhole-free high-k dielectrics with precisely controlled thickness and high conformality. The application of graphene as charge trapping medium in flash memory devices is promising to obtain improved charge storage capability with miniaturization. Graphene acts as an effective charge storage medium due to high density of states in deep energy levels. In this thesis, we fabricate graphene flash memory devices with ALD-grown HfO2/AlN as tunnel layer and Al2O3 as control layer. Graphene oxide nanosheets are derived from the acid exfoliation of natural graphite by Hummers Method. The graphene layer is obtained by spin-coating of water soluble graphene oxide suspension followed by a thermal annealing process. Memory performance including hysteresis window, data retention rate and program transient characteristics for both electron and hole storage mechanisms are determined by performing high frequency capacitance-voltage measurements. For comparing the memory effect of graphene on device performance, we also fabricate and characterize identical flash capacitors with Si-rich SiN layer as charge storage medium and HfO2 as tunnel oxide layer. The Si-nitride films are deposited with high SiH4/NH3 gas flow ratio by plasma-enhanced chemical vapor deposition system. Graphene flash memory devices exhibit superior memory performance. Compared with Si-nitride based cells, hysteresis window, retention performance and programming speed are both significantly enhanced with the use of graphene. For electron storage, graphene flash memory provides a saturated flat band shift of 1.2 V at a write-pulse duration of 100 ns with a voltage bias of 5 V. The high density of states and high work function of graphene improve the memory performance, leading to increased charge storage capability, enhanced retention rate and faster programming operation at low voltages. The use of graphene as charge storage medium and ALD-grown high-k dielectrics as tunnel and control layers improves the existing flash technology and satisfies the requirements including scalability, at least 10-year retention, low voltage operation, faster write performance and CMOS-compatible fabrication.
Open Access
Passivation of type II InAs / GaSb superlattice photodetectors with atomic layer deposited Al2O3
(SPIE, 2012) Salihoğlu, Ömer; Muti, Abdullah; Kutluer, K.; Tansel, T.; Turan, R.; Kocabaş, Coşkun; Aydınlı, Atilla
We have achieved significant improvement in the electrical performance of the InAs/GaSb midwave infrared photodetector (MWIR) by using atomic layer deposited (ALD) aluminium oxide (Al2O3) as a passivation layer. Plasma free and low operation temperature with uniform coating of ALD technique leads to a conformal and defect free coverage on the side walls. This conformal coverage of rough surfaces also satisfies dangling bonds more efficiently while eliminating metal oxides in a self cleaning process of the Al2O3 layer. Al2O3 passivated and unpassivated diodes were compared for their electrical and optical performances. For passivated diodes the dark current density was improved by an order of magnitude at 77 K. The zero bias responsivity and detectivity was 1.33 A/W and 1.9 x 1013 Jones, respectively at 4 µm and 77 K. Quantum efficiency (QE) was determined as %41 for these detectors.
Open Access
Reusable and flexible heterogeneous catalyst for reduction of TNT by Pd nanocube decorated ZnO nanolayers onto electrospun polymeric nanofibers
(Wiley-Blackwell, 2017-10) Arslan, O.; Eren, H.; Bıyıklı, Necmi; Uyar, Tamer
An effective method for the fabrication of well designed nanocomposite for the catalytic reduction of 2,4,6-trinitrotoluene (TNT) was developed. Here, cubic palladium (Pd) nanoparticles were utilized for enhancing the interface properties, attachment quality, catalytic yield and stability after the catalysis reactions. Ligand controlled facet growth by the Br- anions during thermal decomposition of the palladium-precursor resulted with cubic shaped average ∼13 nm palladium nanocubes (Pd NC). The anisotropic Pd NC were utilized to decorate the surface of the zinc oxide (ZnO) nanolayers deposited by atomic layer deposition (ALD) technique on the electrospun polyacrylonitrile (PAN) nanofibers. Due to the polymeric nature of the electrospun PAN nanofibers, Pd NC decorated nanoweb is highly flexible and has a high surface area. For the sustainable Pd NC decoration on the ZnO surfaces coated on PAN nanofibers, anchor points were formed by the functional thiol groups which can facilitate the Pd NC attachment and stability on the ZnO surface. The -OH and alkyl thiol groups obtained via sol-gel reactions positioned on the ZnO layer providing a better interface between ZnO and Pd NC which cannot be obtained by pristine PAN nanofibers. Additionally, due to the increased surface interaction, geometrical positioning on fibers for a better intermediate complex formation and stability via soft-soft interaction, Pd NC decorated flexible polymeric electrospun nanoweb provided enhanced catalytic reduction of TNT in aqueous medium.
Open Access
Structural properties of AIN films deposited by plasma-enhanced atomic layer deposition at different growth temperatures
(Wiley, 2012) Alevli, M.; Ozgit, C.; Donmez, I.; Bıyıklı, Necmi
Crystalline aluminum nitride (AlN) films have been prepared by plasma-enhanced atomic layer deposition (PEALD) within the temperature range from 100 to 500 °C. A self-limiting, constant growth rate per cycle temperature window (100-200 °C) was established which is the major characteristic of an ALD process. At higher temperatures (>225 °C), deposition rate increased with temperature. Chemical composition, crystallinity, surface morphology, mass density, and spectral refractive index were studied for AlN films. X-ray photoelectron spectroscopy (XPS) analyses indicated that besides main Al-N bond, the films contained Al-O-N, Al-O complexes, and Al-Al metallic aluminum bonds as well. Crystalline hexagonal AlN films were obtained at remarkably low growth temperatures. The mass density increased from 2.65 to 2.96 g/cm 3 and refractive index of the films increased from 1.88 to 2.08 at 533 nm for film growth temperatures of 100 and 500 °C, respectively. Copyright © 2012 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Open Access
ZnO, TiO² and exotic materials for low temperature thin film electronic devices
(2012) Oruç, Feyza Bozkurt
The metal-oxide-semiconductor field-effect transistor (MOSFET) technology is the core of integrated circuit industry. Nearly all electronic devices around us contain transistors for various purposes like electronic switches, amplifiers or sensors. As the need for more complex and miniature circuits has arisen, scaling down transistor sizes become the top priority. As Moore’s law indicates, number of transistors on integrated circuits doubles every two years but in future fabrication challenges and limitations like quantum effects seen in small devices will block further miniaturization. New growth techniques are required for depositing conformal, high quality films -like high-k dielectrics instead of SiO2- with atomic thickness control to reduce possible problems. Atomic layer deposition techniques are developed to meet these requirements. The field of thin film transistors (TFT), which is a subset of MOSFET’s have first started to be used in flat panel displays but now they are used in various fields, since their functional properties make them powerful candidates for sensor applications. ALD technology is important also for TFT applications since its low temperature growth mechanism allows fabricating TFT’s on various substrates like flexible and/or transparent ones. With ALD technique, transistors can be built even on cloths which makes the dream of e-suits real. In this thesis, thin film transistors are designed and fabricated using atomic layer deposition technique both for channel and dielectric layer growth. Design and fabrication steps of the TFT devices are realized in a cleanroom environment. The fabricated TFT’s are mainly characterized by measuring their current-voltage relations. A parameter analyzer with a probe station is used for such measurements. ALD grown ZnO TFT’s and the effect of growth temperature on performance characteristics are examined. High performance devices having very high Ion/Ioff ratios are fabricated at a temperature low as 80°C. ALD grown TiO2 TFT’s are also fabricated and effects of annealing temperature on device performance are analyzed. This study is, to the best of our knowledge, the first demonstration of TiO2 TFT’s grown by a thermal-ALD system. GaN and pentacene TFT’s are also fabricated and showed promising results. Pentacene TFTs have a special importance since it is a p-type organic semiconductor which gives us the opportunity to work on hybrid organic-inorganic structures. In conclusion, TFT devices based on ALD grown channel and/or dielectric layers show very encouraging results in terms of low cost, low temperature fabrication opportunities and freedom of using any substrate that can handle ALD processing temperature.