The median of a group, containing an odd number of elements, is defined as the middle element, when the elements of the group are sorted. A median filter finds the median of a number of elements at its inputs. Median filters are frequently used in many signal and image processing applications for smoothing of the noisy signals and images while at the same time preserving the edge information. The required window size, speed, and the word length of the median filters vary depending on the applications. In order to meet these changing demands a general purpose median filter unit configuration is proposed. The unit consists of two single-chip median filters. One of the chips is designed for unlimited word-length and extensibility to larger window sizes whereas the other one is for real-time video applications. The networks of the chips are based on the odd/even transposition sorting. The chips are implemented in 3-mu m MsquareCMOS by using full-custom VLSI design techniques. For physical testing of the chips, the test vectors and the corresponding outputs of the chips are generated by using software tools written for this purpose. In this thesis, the algorithms, VLSI implementations, simulation results, testing, and applications of the chips are presented.