A VLSI architecture for real-time digital receive beamforming in phased array ultrasound imaging is proposed. The architecture is an inverse binary tree like structure with N stages where N is the number of array elements. The sampled signals from the phased array channels are coherently added in a pairwise manner within the stages of the architecture in a pipelined data flow scheme. The storage requirement for the synchronization of the asynchronously received samples corresponding to a focal point is significantly reduced. The architecture is modular and has a regular communication scheme which make the VLSI implementation rather easy and straightforward.