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      NS-SRAM: neighborhood solidarity SRAM for reliability enhancement of SRAM memories

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      Author(s)
      Alouani, I.
      Ahangari, Hamzeh
      Öztürk, Özcan
      Niar, S.
      Date
      2016-08-09
      Source Title
      2016 Euromicro Conference on Digital System Design (DSD)
      Publisher
      IEEE
      Pages
      154 - 159
      Language
      English
      Type
      Conference Paper
      Item Usage Stats
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      Abstract
      Technology shift and voltage scaling increased the susceptibility of Static Random Access Memories (SRAMs) to errors dramatically. In this paper, we present NS-SRAM, for Neighborhood Solidarity SRAM, a new technique to enhance error resilience of SRAMs by exploiting the adjacent memory bit data. Bit cells of a memory line are paired together in circuit level to mutually increase the static noise margin and critical charge of a cell. Unlike existing techniques, NS-SRAM aims to enhance both Bit Error Rate (BER) and Soft Error rate (SER) at the same time. Due to auto-adaptive joiners, each of the adjacent cells' nodes is connected to its counterpart in the neighbor bit. NS-SRAM enhances read-stability by increasing critical Read Static Noise Margin (RSNM), thereby decreasing faults when circuit operates under voltage scaling. It also increases hold-stability and critical charge to mitigate soft-errors. By the proposed technique, reliability of SRAM based structures such as cache memories and register files can drastically be improved with comparable area overhead to existing hardening techniques. Moreover it does not require any extra-memory, does not impact the memory effective size, and has no negative impact on performance. © 2016 IEEE.
      Keywords
      Reliability
      SNM
      Soft errors
      SRAM
      Bit error rate
      Cache memory
      Computer control
      Digital storage
      Error correction
      Errors
      Radiation hardening
      Random access storage
      Random errors
      Reliability
      Systems analysis
      Voltage scaling
      Error resilience
      Read static noise margin (RSNM)
      Reliability enhancement
      Soft error
      Soft error rate
      Static noise margin
      Static random access memory
      Technology shift
      Static random access storage
      Permalink
      http://hdl.handle.net/11693/37753
      Published Version (Please cite this version)
      http://dx.doi.org/10.1109/DSD.2016.12
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      • Department of Computer Engineering 1510
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