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      Hybrid stacked memory architecture for energy efficient embedded chip-multiprocessors based on compiler directed approach

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      Author(s)
      Onsori, Salman
      Asad, A.
      Öztürk, Özcan
      Fathy, M.
      Date
      2015-12
      Source Title
      6th International Green and Sustainable Computing Conference, (IGSC) 2015
      Publisher
      IEEE
      Pages
      1 - 7
      Language
      English
      Type
      Conference Paper
      Item Usage Stats
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      Abstract
      Energy consumption becomes the most critical limitation on the performance of nowadays embedded system designs. On-chip memories due to major contribution in overall system energy consumption are always significant issue for embedded systems. Using conventional memory technologies in future designs in nano-scale era causes a drastic increase in leakage power consumption and temperature-related problems. Emerging non-volatile memory (NVM) technologies are promising replacement for conventional memory structure in embedded systems due to its attractive characteristics such as near-zero leakage power, high density and non-volatility. Recent advantages of NVM technologies can significantly mitigate the issue of memory leakage power. However, they introduce new challenges such as limited write endurance and high write energy consumption which restrict them for adoption in modern memory systems. In this article, we propose a stacked hybrid memory system to minimize energy consumption for 3D embedded chip-multiprocessors (eCMP). For reaching this target, we present a convex optimization-based model to distribute data blocks between SRAM and NVM banks based on data access pattern derived by compiler. Our compiler-assisted hybrid memory architecture can achieve up to 51.28 times improvement in lifetime. In addition, experimental results show that our proposed method reduce energy consumption by 56% on average compared to the traditional memory design where single technology is used. © 2015 IEEE.
      Keywords
      Compiler-assisted
      Convex-optimization based model
      Embedded chip-multiprocessor (eCMP)
      Hybrid memory architecture
      Non-volatile memory (NVM)
      Adaptive systems
      Convex optimization
      Data storage equipment
      Digital storage
      Embedded systems
      Energy efficiency
      Energy utilization
      Multiprocessing systems
      Nanotechnology
      Nonvolatile storage
      Program compilers
      Static random access storage
      Systems analysis
      Data access patterns
      Embedded chips
      Emerging non-volatile memory
      Leakage power consumption
      Reduce energy consumption
      System energy consumption
      Memory architecture
      Permalink
      http://hdl.handle.net/11693/37730
      Published Version (Please cite this version)
      http://dx.doi.org/10.1109/IGCC.2015.7393714
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      • Department of Computer Engineering 1510
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