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      • Faculty of Engineering
      • Department of Electrical and Electronics Engineering
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      2-nm laser-synthesized Si nanoparticles for low-power charge trapping memory devices

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      Author
      El-Atab, N.
      Özcan, Ayşe
      Alkış, Sabri
      Okyay, Ali Kemal
      Nayfeh, A.
      Date
      2014-08
      Source Title
      14th IEEE International Conference on Nanotechnology, IEEE-NANO 2014
      Publisher
      IEEE
      Pages
      505 - 509
      Language
      English
      Type
      Conference Paper
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      Abstract
      In this work, the effect of embedding Silicon Nanoparticles (Si-NPs) in ZnO based charge trapping memory devices is studied. Si-NPs are fabricated by laser ablation of a silicon wafer in deionized water followed by sonication and filtration. The active layer of the memory was deposited by Atomic Layer Deposition (ALD) and spin coating technique was used to deliver the Si-NPs across the sample. The nanoparticles provided a good retention of charges (>10 years) in the memory cells and allowed for a large threshold voltage (Vt) shift (3.4 V) at reduced programming voltages (1 V). The addition of ZnO to the charge trapping media enhanced the electric field across the tunnel oxide and allowed for larger memory window at lower operating voltages. © 2014 IEEE.
      Keywords
      Atomic layer deposition
      Charge trapping
      Deionized water
      Electric fields
      Laser ablation
      Nanoparticles
      Silicon
      Synthesis (chemical)
      Threshold voltage
      Water filtration
      Zinc oxide
      Active Layer
      Charge trapping memory
      Memory window
      Operating voltage
      Programming voltage
      Si nanoparticles
      Silicon nanoparticles
      Tunnel oxides
      Silicon wafers
      Permalink
      http://hdl.handle.net/11693/28696
      Published Version (Please cite this version)
      https://doi.org/10.1109/NANO.2014.6968168
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      • Department of Electrical and Electronics Engineering 3524
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