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dc.contributor.authorUngan, İ. Enisen_US
dc.contributor.authorTopçu, Satılmışen_US
dc.contributor.authorAtalar, Abdullahen_US
dc.coverage.spatialHamburg, West Germany, Germanyen_US
dc.date.accessioned2016-02-08T12:02:37Z
dc.date.available2016-02-08T12:02:37Z
dc.date.issued1989en_US
dc.identifier.urihttp://hdl.handle.net/11693/27835
dc.descriptionDate of Conference: 8-12 May 1989en_US
dc.descriptionConference Name: COMPEURO’89: VLSI and Computer Peripherals, IEEE 1989en_US
dc.description.abstractA single-chip microprocessor-compatible 128-b correlator is designed and implemented in a 3-μm M2CMOS process. Full-custom design techniques are applied to achieve the best tradeoff among chip size, speed, and power consumption. The chip is placed in a microprocessor-based portable data terminal using HF radio communication. It marks the beginning of a synchronous data stream received from the very noisy channel by detecing the synchronization (sync) word. The sync word can be detected for either inverted or noninverted input data streams. Two chips can be cascaded to make a 256-b correlator. The chip is fully programmable by a microprocessor to set the number of tolerable errors in detection and to select the bits of the 128-b (or 256-b) data stream to be used in the correlation.en_US
dc.language.isoEnglishen_US
dc.source.titleProceedings of the COMPEURO’89: VLSI and Computer Peripherals, IEEE 1989en_US
dc.relation.isversionofhttps://doi.org/10.1109/CMPEUR.1989.93504en_US
dc.subjectCorrelatorsen_US
dc.subjectRadio communicationen_US
dc.subjectSemiconductor devicesen_US
dc.subjectCMOS technologyen_US
dc.subjectSynchronous communicationen_US
dc.subjectSynchronous data streamsen_US
dc.titleA 128-bit microprocessor compatible programmable correlator chip for use in synchronous communicationen_US
dc.typeConference Paperen_US
dc.departmentDepartment of Electrical and Electronics Engineeringen_US
dc.citation.spage146en_US
dc.citation.epage147en_US
dc.identifier.doi10.1109/CMPEUR.1989.93504en_US
dc.publisherIEEEen_US


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