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      Adaptive compute-phase prediction and thread prioritization to mitigate memory access latency

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      Author
      Aktürk, İsmail
      Öztürk, Özcan
      Date
      2014-06
      Source Title
      ACM International Conference Proceeding Series
      Publisher
      ACM
      Pages
      1 - 4
      Language
      English
      Type
      Conference Paper
      Item Usage Stats
      161
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      Abstract
      The full potential of chip multiprocessors remains unex- ploited due to the thread oblivious memory access sched- ulers used in off-chip main memory controllers. This is especially pronounced in embedded systems due to limita- Tions in memory. We propose an adaptive compute-phase prediction and thread prioritization algorithm for memory access scheduling for embedded chip multiprocessors. The proposed algorithm eficiently categorize threads based on execution characteristics and provides fine-grained priori- Tization that allows to differentiate threads and prioritize their memory access requests accordingly. The threads in compute phase are prioritized among the threads in mem- ory phase. Furthermore, the threads in compute phase are prioritized among themselves based on the potential of mak- ing more progress in their execution. Compared to the prior works First-Ready First-Come First-Serve (FR-FCFS) and Compute-phase Prediction with Writeback-Refresh Overlap (CP-WO), the proposed algorithm reduces the execution time of the generated workloads up to 23.6% and 12.9%, respectively. Copyright 2014 ACM.
      Keywords
      Computer architecture
      Embedded systems
      Scheduling
      Chip multiprocessor
      Embedded chips
      Main memory
      Memory access
      Memory access latency
      Memory access scheduling
      Off-chip
      Prioritization
      Forecasting
      Permalink
      http://hdl.handle.net/11693/27152
      Published Version (Please cite this version)
      http://dx.doi.org/10.1145/2613908.2613919
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      • Department of Computer Engineering 1368
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