Show simple item record

dc.contributor.authorOzturk, O.en_US
dc.date.accessioned2016-02-08T09:54:29Z
dc.date.available2016-02-08T09:54:29Z
dc.date.issued2011en_US
dc.identifier.issn0743-7315
dc.identifier.urihttp://hdl.handle.net/11693/22029
dc.description.abstractEmbedded applications are becoming increasingly complex and processing ever-increasing datasets. In the context of data-intensive embedded applications, there have been two complementary approaches to enhancing application behavior, namely, data locality optimizations and improving loop-level parallelism. Data locality needs to be enhanced to maximize the number of data accesses satisfied from the higher levels of the memory hierarchy. On the other hand, compiler-based code parallelization schemes require a fresh look for chip multiprocessors as interprocessor communication is much cheaper than off-chip memory accesses. Therefore, a compiler needs to minimize the number of off-chip memory accesses. This can be achieved by considering multiple loop nests simultaneously. Although compilers address these two problems, there is an inherent difficulty in optimizing both data locality and parallelism simultaneously. Therefore, an integrated approach that combines these two can generate much better results than each individual approach. Based on these observations, this paper proposes a constraint network (CN)-based formulation for data locality optimization and code parallelization. The paper also presents experimental evidence, demonstrating the success of the proposed approach, and compares our results with those obtained through previously proposed approaches. The experiments from our implementation indicate that the proposed approach is very effective in enhancing data locality and parallelization. © 2010 Elsevier Inc. All rights reserved.en_US
dc.language.isoEnglishen_US
dc.source.titleJournal of Parallel and Distributed Computingen_US
dc.relation.isversionofhttp://dx.doi.org/10.1016/j.jpdc.2010.08.005en_US
dc.subjectCompilersen_US
dc.subjectConstraint networksen_US
dc.subjectData transformationen_US
dc.subjectLocalityen_US
dc.subjectLoop transformationen_US
dc.subjectParallelismen_US
dc.titleData locality and parallelism optimization using a constraint-based approachen_US
dc.typeArticleen_US
dc.departmentDepartment of Computer Engineeringen_US
dc.citation.spage280en_US
dc.citation.epage287en_US
dc.citation.volumeNumber71en_US
dc.citation.issueNumber2en_US
dc.identifier.doi10.1016/j.jpdc.2010.08.005en_US
dc.publisherAcademic Pressen_US


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record