A decoupled local memory allocator
ACM Transactions on Architecture and Code Optimization
Association for Computing Machinery
34:1 - 34:22
Item Usage Stats
MetadataShow full item record
Please cite this item using this persistent URLhttp://hdl.handle.net/11693/21123
Compilers use software-controlled local memories to provide fast, predictable, and power-efficient access to critical data. We show that the local memory allocation for straight-line, or linearized programs is equivalent to a weighted interval-graph coloring problem. This problem is new when allowing a color interval to "wrap around," and we call it the submarine-building problem. This graph-theoretical decision problem differs slightly from the classical ship-building problem, and exhibits very interesting and unusual complexity properties. We demonstrate that the submarine-building problem is NP-complete, while it is solvable in linear time for not-so-proper interval graphs, an extension of the the class of proper interval graphs. We propose a clustering heuristic to approximate any interval graph into a not-so-proper interval graph, decoupling spill code generation from local memory assignment. We apply this heuristic to a large number of randomly generated interval graphs reproducing the statistical features of standard local memory allocation benchmarks, comparing with state-of-the-art heuristics. © 2013 ACM.
Proper interval graphs
Scratch pad memory
Storage allocation (computer)
Showing items related by title, author, creator and subject.
Ozturk, O.; Kandemir, M.; Irwin, M. J. (Institute of Electrical and Electronics Engineers, 2009-06)The memory system presents one of the critical challenges in embedded system design and optimization. This is mainly due to the ever-increasing code complexity of embedded applications and the exponential increase seen in ...
Onsori, S.; Asad, A.; Raahemifar, K.; Fathy, M. (Institute of Electrical and Electronics Engineers Inc., 2015)In this article, we present a convex optimization model to design a stacked hybrid memory system for 3D embedded chip-multiprocessors (eCMP). Our convex model optimizes numbers and placement of SRAM and STT-RAM memories ...
Oruc, F. B.; Cimen, F.; Rizk, A.; Ghaffari, M.; Nayfeh, A.; Okyay, A., K. (Institute of Electrical and Electronics Engineers, 2012-10-26)A thin-film ZnO-based single-transistor memory cell with a gate stack deposited in a single atomic layer deposition step is demonstrated. Thin-film ZnO is used as channel material and charge-trapping layer for the first ...