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dc.contributor.authorOzturk, O.en_US
dc.contributor.authorKandemir, M.en_US
dc.contributor.authorChen G.en_US
dc.date.accessioned2016-02-08T09:41:26Z
dc.date.available2016-02-08T09:41:26Z
dc.date.issued2013en_US
dc.identifier.issn0018-9340
dc.identifier.urihttp://hdl.handle.net/11693/21118
dc.description.abstractAddressing power and energy consumption related issues early in the system design flow ensures good design and minimizes iterations for faster turnaround time. In particular, optimizations at software level, e.g., those supported by compilers, are very important for minimizing energy consumption of embedded applications. Recent research demonstrates that voltage islands provide the flexibility to reduce power by selectively shutting down the different regions of the chip and/or running the select parts of the chip at different voltage/frequency levels. As against most of the prior work on voltage islands that mainly focused on the architecture design and IP placement related issues, this paper studies the necessary software compiler support for voltage islands. Specifically, we focus on an embedded multiprocessor architecture that supports both voltage islands and control domains within these islands, and determine how an optimizing compiler can automatically map an embedded application onto this architecture. Such an automated support is critical since it is unrealistic to expect an application programmer to reach a good mapping correlating multiple factors such as performance and energy at the same time. Our experiments with the proposed compiler support show that our approach is very effective in reducing energy consumption. The experiments also show that the energy savings we achieve are consistent across a wide range of values of our major simulation parameters. © 1968-2012 IEEE.en_US
dc.language.isoEnglishen_US
dc.source.titleIEEE Transactions on Computersen_US
dc.relation.isversionofhttp://dx.doi.org/10.1109/TC.2011.229en_US
dc.subjectCompiler optimizationsen_US
dc.subjectCompiler-based parallelizationen_US
dc.subjectEnergy consumptionen_US
dc.subjectVoltage islandsen_US
dc.subjectVoltage scalingen_US
dc.subjectApplication programmersen_US
dc.subjectArchitecture designsen_US
dc.subjectAutomated supporten_US
dc.subjectControl domainsen_US
dc.subjectDynamic voltage scalingen_US
dc.subjectEmbedded applicationen_US
dc.subjectEmbedded multiprocessor architecturesen_US
dc.subjectEnergy reductionen_US
dc.subjectMultiple factorsen_US
dc.subjectOptimizing compilersen_US
dc.subjectParallelizationsen_US
dc.subjectReducing energy consumptionen_US
dc.subjectSimulation parametersen_US
dc.subjectSystem design flowsen_US
dc.subjectEnergy utilizationen_US
dc.subjectExperimentsen_US
dc.subjectOptimizationen_US
dc.subjectTurnaround timeen_US
dc.subjectProgram compilersen_US
dc.titleCompiler-directed energy reduction using dynamic voltage scaling and voltage islands for embedded systemsen_US
dc.typeArticleen_US
dc.departmentDepartment of Computer Engineeringen_US
dc.citation.spage268en_US
dc.citation.epage278en_US
dc.citation.volumeNumber62en_US
dc.citation.issueNumber2en_US
dc.identifier.doi10.1109/TC.2011.229en_US
dc.publisherInstitute of Electrical and Electronics Engineersen_US


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