Digital dual tone multifrequency receiver

Date

1994

Editor(s)

Advisor

Atalar, Abdullah

Supervisor

Co-Advisor

Co-Supervisor

Instructor

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Abstract

In this thesis, a suitable algorithm for detection of Dual Tone Multifrequency tones is proposed and implemented as a VLSI chip. The algorithm is based on an approximation of correlation. The input signal is correlated with the hardlimited versions of three sinusoids having 7Ty^3 phase difference. Also, a level detector is added to the algorithm. The algorithm only requires addition and subtraction, but no multiplication; and this reduces the complexity of the circuit. The implementation of the algorithm proposed has been realized as a fully integrated digital DTMF receiver chip using semi-custom layout techniques. The final chip is fabricated in 1-^m CMOS technology, and it has a total area of 24.78 mm^.

Source Title

Publisher

Course

Other identifiers

Book Title

Degree Discipline

Electrical and Electronic Engineering

Degree Level

Master's

Degree Name

MS (Master of Science)

Citation

Published Version (Please cite this version)

Language

English

Type