Parallel mapping and circuit partitioning heuristics based on mean field annealing
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Moan Field Annealinp; (MFA) aJgoritlim, receñí,ly proposc'd for solving com binatorial optimization problems, combines the characteristics of nenral networks and simulated annealing. In this thesis, MFA is formulated for tlie mapping i)roblcm and the circuit partitioning problem. EHicient implementation schemes, which decrease the complexity of the proposed algorithms by asymptotical factors, are also given. Perlormances of the proposed MFA algorithms are evaluated in comparison with two well-known heuristics: simulated annealing and Kernighan-Lin. Results of the experiments indicate that MFA can be used as an alternative heuristic for the mapping problem and the circuit partitioning problem. Inherent parallelism of the MFA is exploited by designing efficient parallel algorithms for the proposed MFA heuristics. Parallel MFA algorithms proposed for solving the circuit partitioning problem are implemented on an iPS(J/2’ hypercube multicompute.r. Experimental results show that the proposed heuristics can be efficiently parallelized, which is crucial for algorithms that solve such computationally hard problems.
KeywordsMean Field Annealing
Circuit Partitioning Problem
QA402.5 .B85 1992
Simulated annealing (Mathematics).