dc.contributor.advisor | Öztürk, Özcan | |
dc.contributor.author | Aktürk, İsmail | |
dc.date.accessioned | 2016-01-08T18:25:37Z | |
dc.date.available | 2016-01-08T18:25:37Z | |
dc.date.issued | 2013 | |
dc.identifier.uri | http://hdl.handle.net/11693/15856 | |
dc.description | Ankara : The Department of Computer Engineering and the Graduate School of Engineering and Science of Bilkent University, 2013. | en_US |
dc.description | Thesis (Master's) -- Bilkent University, 2013. | en_US |
dc.description | Includes bibliographical references leaves 76-81. | en_US |
dc.description.abstract | The full potential of chip multiprocessors remains unexploited due to architecture
oblivious thread schedulers used in operating systems, and thread-oblivious
memory access schedulers used in off-chip main memory controllers. For the
thread scheduling, we introduce an adaptive cache-hierarchy-aware scheduler that
tries to schedule threads in a way that inter-thread contention is minimized. A
novel multi-metric scoring scheme is used that specifies the L1 cache access characteristics
of a thread. The scheduling decisions are made based on multi-metric
scores of threads. For the memory access scheduling, we introduce an adaptive
compute-phase prediction and thread prioritization scheme that efficiently categorize
threads based on execution characteristics and provides fine-grained prioritization
that allows to differentiate threads and prioritize their memory access
requests accordingly. | en_US |
dc.description.statementofresponsibility | Aktürk, İsmail | en_US |
dc.format.extent | xvi, 113 leaves, graphics, tables | en_US |
dc.language.iso | English | en_US |
dc.rights | info:eu-repo/semantics/openAccess | en_US |
dc.subject | Adaptive Scheduling | en_US |
dc.subject | Chip Multiprocessors | en_US |
dc.subject | Inter-thread Contention | en_US |
dc.subject | Thread Phase Prediction | en_US |
dc.subject | Multi-metric Scoring | en_US |
dc.subject.lcc | QA76.5 .A489 2013 | en_US |
dc.subject.lcsh | Multiprocessors. | en_US |
dc.subject.lcsh | Systems on a chip. | en_US |
dc.subject.lcsh | Scheduling (Management) | en_US |
dc.title | Adaptive thread and memory access schelduling in chip multiprocessors | en_US |
dc.type | Thesis | en_US |
dc.department | Department of Computer Engineering | en_US |
dc.publisher | Bilkent University | en_US |
dc.description.degree | M.S. | en_US |
dc.identifier.itemid | B147872 | |