Adaptive digital predistortion for power amplifier linearization
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High power amplification of linear modulation schemes which exhibit fluctuating envelopes, invariably leads to the generation of distortion and intermodulation products. In order to avoid these effects, maintaining both power and spectral efficiency, it is necessary to use linearization techniques. By using linearization techniques, the amplifier can be operated near the saturation with good efficiency and linearity. The technique proposed here is predistortion based on a look-up table (LUT) method using input and output signal envelopes. The predistortion is implemented using a LUT and an address generation block that selects the appropriate coefficient from the LUT, given the magnitude of the input signal. The testing of the predistorter is done by using a baseband system model which consists of a 16-QAM modulator, an upsampler, a raised cosine filter, the predistorter and a baseband behavioural amplifier model. The performance of the predistorter with a new LUT update method is evaluated in terms of power efficiency and spectrum efficiency. MATLAB simulations show that to obtain up to 25-30 dB improvement in power spectrum is possible and sufficiently large LUT size is needed to reduce the background noise level. Furthermore, the performance of the predistorter in the case of an amplifier with memory is also investigated. The algorithms have been implemented on an FPGA chip. The performance of the system is as predicted in MATLAB simulations.
KeywordsAptive Digital Predistortion
Look-up Table Predistortion