Scanning probe lithography (SPL) is capable of sub-30-nm-patterning resolution and nanometer-scale alignment registration, suggesting it might provide a solution to the semiconductor industry’s lithography challenges. However, SPL throughput is significantly lower than conventional lithography techniques. Low throughput most limits the widespread use of SPL for high resolution patterning applications. This article addresses the speed constraints for reliable patterning of organic resists. Electrons field emitted from a sharp probe tip are used to expose the resist. Finite tip-sample capacitance limits the bandwidth of current-controlled lithography in which the tip-sample voltage bias is varied to maintain a fixed emission current during exposure. We have introduced a capacitance compensation scheme to ensure continuous resist exposure of SAL601 polymer resist at scan speeds up to 1 mm/s. We also demonstrate parallel resist exposure with two tips, where the emission current from each tip is individually controlled. Simultaneous patterning with multiple tips may make SPL a viable technology for high resolution lithography.