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      Self-aligning planarization and passivation for integration applications in III-V semiconductor devices

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      Author(s)
      Demir, Hilmi Volkan
      Zheng, J.-F.
      Sabnis, V. A.
      Fidaner, O.
      Hanberg, J.
      Harris, J. S.
      Miller, D. A. B.
      Date
      2005
      Source Title
      IEEE Transactions on Semiconductor Manufacturing
      Print ISSN
      0894-6507
      Publisher
      IEEE
      Volume
      18
      Issue
      1
      Pages
      182 - 189
      Language
      English
      Type
      Article
      Item Usage Stats
      165
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      121
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      Abstract
      This paper reports an easy planarization and passivation approach for the integration of III-V semiconductor devices. Vertically etched III-V semiconductor devices typically require sidewall passivation to suppress leakage currents and planarization of the passivation material for metal interconnection and device integration. It is, however, challenging to planarize all devices at once. This technique offers wafer-scale passivation and planarization that is automatically leveled to the device top in the 1-3-mum vicinity surrounding each device. In this method, a dielectric hard mask is used to define the device area. An undercut structure is intentionally created below the hard mask, which is retained during the subsequent polymer spinning and anisotropic polymer etch back., The spin-on polymer that fills in the undercut seals the sidewalls for all the devices across the wafer. After the polymer etch back, the dielectric mask is removed leaving the polymer surrounding each device level with its device top to atomic scale flatness. This integration method is robust and is insensitive to spin-on polymer thickness, polymer etch nonuniformity, and device height difference. It prevents the polymer under the hard mask from etch-induced damage and creates a polymer-free device surface for metallization upon removal of the dielectric mask. We applied this integration technique in fabricating an InP-based photonic switch that consists of a mesa photodiode and a quantum-well waveguide modulator using benzocyclobutene (BCB) polymer. We demonstrated functional integrated photonic switches with high process yield of >90%, high breakdown voltage of >25 V, and low ohmic contact resistance of similar to 10 Omega. To the best of our knowledge, such an integration of a surface-normal photodiode and a lumped electroabsorption modulator with the use of BCB is the first to be implemented on a single substrate.
      Keywords
      Integrated optoelectronics
      Passivation
      Semiconductor device manufacturing
      Wafer-scale integration
      Permalink
      http://hdl.handle.net/11693/11462
      Published Version (Please cite this version)
      http://dx.doi.org/10.1109/TSM.2004.841834
      Collections
      • Department of Electrical and Electronics Engineering 3702
      • Department of Physics 2397
      • Institute of Materials Science and Nanotechnology (UNAM) 1930
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