Browsing by Subject "Atomic layer deposition."
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Item Open Access Atomic layer deposition of metal oxide thin films and nanostructures(Bilkent University, 2013) Dönmez, İnciWith the continuing scaling down of microelectronic integrated circuits and increasing need for three-dimensional stacking of functional layers, novel or improved growth techniques are required to deposit thin films with high conformality and atomic level thickness control. As being different from other thin film deposition techniques, atomic layer deposition (ALD) is based on selflimiting surface reactions. The self-limiting film growth mechanism of ALD ensures excellent conformality and large area uniformity of deposited films. Additionally, film thickness can be accurately controlled by the number of sequential surface reactions. Gallium oxide (Ga2O3) thin films were deposited by plasma-enhanced ALD (PEALD) using trimethylgallium as the gallium precursor and oxygen plasma as the oxidant. A wide ALD temperature window was observed from 100 to 400 °C, where the deposition rate was constant at ~0.53 Å/cycle. The deposition parameters, composition, crystallinity, surface morphology, optical and electrical properties were studied for as-deposited and annealed Ga2O3 films. In order to investigate the electrical properties of the deposited films, metal-oxide-semiconductor capacitor structures were fabricated for a variety of film thicknesses and annealing temperatures. Ga2O3 films exhibited decent dielectric properties after crystallization upon annealing. Dielectric constant was increased with film thickness and decreased slightly with increasing annealing temperature. As an additional PEALD experiment, deposition parameters of In2O3 thin films were studied as well, using the precursors of cyclopentadienyl indium and O2 plasma. Initial results of this experiment effort are also presented. Accurate thickness control, along with high uniformity and conformality offered by ALD makes this technique quite promising for the deposition of conformal coatings on nanostructures. This thesis also deals with the synthesis of metal oxide nanotubes using organic nanofiber templates. Combination of electrospinning and ALD processes provided an opportunity to precisely control both diameter and wall thickness of the synthesized nanotubes. As a proof-ofconcept, hafnia (HfO2) nanotubes were synthesized using three-step approach: (i) preparation of the nylon 6,6 nanofiber template by electrospinning, (ii) conformal deposition of HfO2 on the electrospun polymer template via ALD using the precursors of tetrakis(dimethylamido)hafnium and water at 200 °C, and (iii) removal of the organic template by calculation to obtain freestanding HfO2 nanotubes (hollow nanofibers). When the same deposition procedure was applied on nanofibers with different average fiber diameters, thinner HfO2 wall thicknesses were obtained for the templates having smaller diameters due to insufficient exposure of precursor molecules to saturate their extremely large surface area. Thus, “exposure mode” was applied to obtain the desired wall thickness while coating high-surface area nanofibers. We present the experimental efforts including film deposition parameters, structural, elemental, and morphological properties of HfO2 nanotubes.Item Open Access High performance floating gate memories using graphene as charge storage medium and atomic layer deposited high-k dielectric layers as tunnel barrier(Bilkent University, 2013) Kocaay, DenizWith the ongoing development in portable electronic devices, low power consumption, improved data retention rate and higher operation speed are the merits demanded by modern non-volatile memory technology. Flash memory devices with discrete charge-trapping media are regarded as an alternative solution to conventional floating gate technology. Flash memories utilizing Sinitride as charge storage media dominate due to enhanced endurance, better scaling capability and simple fabrication. The use of high-k dielectrics as tunnel layer and control layer is also crucial in charge-trap flash memory devices since they allow further scaling and enhanced charge injection without data retention degradation. Atomic layer deposition (ALD) is a powerful technique for the growth of pinhole-free high-k dielectrics with precisely controlled thickness and high conformality. The application of graphene as charge trapping medium in flash memory devices is promising to obtain improved charge storage capability with miniaturization. Graphene acts as an effective charge storage medium due to high density of states in deep energy levels. In this thesis, we fabricate graphene flash memory devices with ALD-grown HfO2/AlN as tunnel layer and Al2O3 as control layer. Graphene oxide nanosheets are derived from the acid exfoliation of natural graphite by Hummers Method. The graphene layer is obtained by spin-coating of water soluble graphene oxide suspension followed by a thermal annealing process. Memory performance including hysteresis window, data retention rate and program transient characteristics for both electron and hole storage mechanisms are determined by performing high frequency capacitance-voltage measurements. For comparing the memory effect of graphene on device performance, we also fabricate and characterize identical flash capacitors with Si-rich SiN layer as charge storage medium and HfO2 as tunnel oxide layer. The Si-nitride films are deposited with high SiH4/NH3 gas flow ratio by plasma-enhanced chemical vapor deposition system. Graphene flash memory devices exhibit superior memory performance. Compared with Si-nitride based cells, hysteresis window, retention performance and programming speed are both significantly enhanced with the use of graphene. For electron storage, graphene flash memory provides a saturated flat band shift of 1.2 V at a write-pulse duration of 100 ns with a voltage bias of 5 V. The high density of states and high work function of graphene improve the memory performance, leading to increased charge storage capability, enhanced retention rate and faster programming operation at low voltages. The use of graphene as charge storage medium and ALD-grown high-k dielectrics as tunnel and control layers improves the existing flash technology and satisfies the requirements including scalability, at least 10-year retention, low voltage operation, faster write performance and CMOS-compatible fabrication.